ec43287aa0
Adjust SD timeouts accordingly. Adjust code in debug-as3525.c to display correct frequencies on system/debug/View disk info page. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23350 a1c6a512-1295-4272-9138-f99709370657
932 lines
27 KiB
C
932 lines
27 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 Daniel Ankers
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* Copyright © 2008-2009 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/* Driver for the ARM PL180 SD/MMC controller inside AS3525 SoC */
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/* TODO: Find the real capacity of >2GB models (will be useful for USB) */
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#include "config.h" /* for HAVE_MULTIDRIVE & AMS_OF_SIZE */
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#include "fat.h"
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#include "thread.h"
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#include "led.h"
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#include "hotswap.h"
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#include "system.h"
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#include "cpu.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "as3525.h"
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#include "pl180.h" /* SD controller */
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#include "pl081.h" /* DMA controller */
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#include "dma-target.h" /* DMA request lines */
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#include "clock-target.h"
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#include "panic.h"
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#ifdef HAVE_BUTTON_LIGHT
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#include "backlight-target.h"
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#endif
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#include "stdbool.h"
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#include "ata_idle_notify.h"
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#include "sd.h"
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#include "usb.h"
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#ifdef HAVE_HOTSWAP
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#include "disk.h"
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#endif
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/* command flags */
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#define MCI_NO_FLAGS (0<<0)
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#define MCI_RESP (1<<0)
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#define MCI_LONG_RESP (1<<1)
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#define MCI_ARG (1<<2)
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/* ARM PL180 registers */
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#define MCI_POWER(i) (*(volatile unsigned char *) (pl180_base[i]+0x00))
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#define MCI_CLOCK(i) (*(volatile unsigned long *) (pl180_base[i]+0x04))
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#define MCI_ARGUMENT(i) (*(volatile unsigned long *) (pl180_base[i]+0x08))
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#define MCI_COMMAND(i) (*(volatile unsigned long *) (pl180_base[i]+0x0C))
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#define MCI_RESPCMD(i) (*(volatile unsigned long *) (pl180_base[i]+0x10))
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#define MCI_RESP0(i) (*(volatile unsigned long *) (pl180_base[i]+0x14))
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#define MCI_RESP1(i) (*(volatile unsigned long *) (pl180_base[i]+0x18))
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#define MCI_RESP2(i) (*(volatile unsigned long *) (pl180_base[i]+0x1C))
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#define MCI_RESP3(i) (*(volatile unsigned long *) (pl180_base[i]+0x20))
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#define MCI_DATA_TIMER(i) (*(volatile unsigned long *) (pl180_base[i]+0x24))
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#define MCI_DATA_LENGTH(i) (*(volatile unsigned short*) (pl180_base[i]+0x28))
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#define MCI_DATA_CTRL(i) (*(volatile unsigned char *) (pl180_base[i]+0x2C))
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#define MCI_DATA_CNT(i) (*(volatile unsigned short*) (pl180_base[i]+0x30))
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#define MCI_STATUS(i) (*(volatile unsigned long *) (pl180_base[i]+0x34))
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#define MCI_CLEAR(i) (*(volatile unsigned long *) (pl180_base[i]+0x38))
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#define MCI_MASK0(i) (*(volatile unsigned long *) (pl180_base[i]+0x3C))
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#define MCI_MASK1(i) (*(volatile unsigned long *) (pl180_base[i]+0x40))
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#define MCI_SELECT(i) (*(volatile unsigned long *) (pl180_base[i]+0x44))
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#define MCI_FIFO_CNT(i) (*(volatile unsigned long *) (pl180_base[i]+0x48))
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#define MCI_ERROR \
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(MCI_DATA_CRC_FAIL | MCI_DATA_TIMEOUT | MCI_RX_OVERRUN | MCI_TX_UNDERRUN)
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#define MCI_FIFO(i) ((unsigned long *) (pl180_base[i]+0x80))
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/* volumes */
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#define INTERNAL_AS3525 0 /* embedded SD card */
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#define SD_SLOT_AS3525 1 /* SD slot if present */
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static const int pl180_base[NUM_DRIVES] = {
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NAND_FLASH_BASE
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#ifdef HAVE_MULTIDRIVE
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, SD_MCI_BASE
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#endif
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};
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static int sd_wait_for_state(const int drive, unsigned int state);
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static int sd_select_bank(signed char bank);
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static int sd_init_card(const int drive);
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static void init_pl180_controller(const int drive);
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#define SECTOR_SIZE 512 /* XXX: different sector sizes ? */
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#define BLOCKS_PER_BANK 0x7a7800
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static tCardInfo card_info[NUM_DRIVES];
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#ifdef HAVE_MULTIDRIVE
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/* maximum timeouts recommended in the SD Specification v2.00 */
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#define SD_MAX_READ_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \
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(AS3525_IDE_FREQ)) / 1000 * 100) /* 100 ms */
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#define SD_MAX_WRITE_TIMEOUT (((drive == SD_SLOT_AS3525)? (AS3525_PCLK_FREQ): \
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(AS3525_IDE_FREQ)) / 1000 * 250) /* 250 ms */
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#else
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/* maximum timeouts recommended in the SD Specification v2.00 */
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#define SD_MAX_READ_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 100) /* 100 ms */
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#define SD_MAX_WRITE_TIMEOUT ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */
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#endif
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/* for compatibility */
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static long last_disk_activity = -1;
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#define MIN_YIELD_PERIOD 5 /* ticks */
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static long next_yield = 0;
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static long sd_stack [(DEFAULT_STACK_SIZE*2 + 0x200)/sizeof(long)];
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static const char sd_thread_name[] = "ata/sd";
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static struct mutex sd_mtx;
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static struct event_queue sd_queue;
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#ifndef BOOTLOADER
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static bool sd_enabled = false;
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#endif
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static struct wakeup transfer_completion_signal;
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static volatile unsigned int transfer_error[NUM_VOLUMES];
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#define PL180_MAX_TRANSFER_ERRORS 10
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#define UNALIGNED_NUM_SECTORS 10
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static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS* SECTOR_SIZE] __attribute__((aligned(32))); /* align on cache line size */
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static unsigned char *uncached_buffer = UNCACHED_ADDR(&aligned_buffer[0]);
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static inline void mci_delay(void) { int i = 0xffff; while(i--) ; }
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#ifdef HAVE_HOTSWAP
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static int sd1_oneshot_callback(struct timeout *tmo)
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{
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(void)tmo;
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/* This is called only if the state was stable for 300ms - check state
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* and post appropriate event. */
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if (card_detect_target())
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{
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queue_broadcast(SYS_HOTSWAP_INSERTED, 0);
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}
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else
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queue_broadcast(SYS_HOTSWAP_EXTRACTED, 0);
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return 0;
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}
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void INT_GPIOA(void)
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{
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static struct timeout sd1_oneshot;
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/* acknowledge interrupt */
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GPIOA_IC = (1<<2);
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timeout_register(&sd1_oneshot, sd1_oneshot_callback, (3*HZ/10), 0);
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}
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#endif /* HAVE_HOTSWAP */
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void INT_NAND(void)
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{
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const int status = MCI_STATUS(INTERNAL_AS3525);
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transfer_error[INTERNAL_AS3525] = status & MCI_ERROR;
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wakeup_signal(&transfer_completion_signal);
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MCI_CLEAR(INTERNAL_AS3525) = status;
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}
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#ifdef HAVE_MULTIDRIVE
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void INT_MCI0(void)
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{
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const int status = MCI_STATUS(SD_SLOT_AS3525);
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transfer_error[SD_SLOT_AS3525] = status & MCI_ERROR;
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wakeup_signal(&transfer_completion_signal);
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MCI_CLEAR(SD_SLOT_AS3525) = status;
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}
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#endif
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static bool send_cmd(const int drive, const int cmd, const int arg,
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const int flags, long *response)
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{
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int val, status;
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while(MCI_STATUS(drive) & MCI_CMD_ACTIVE);
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if(MCI_COMMAND(drive) & MCI_COMMAND_ENABLE) /* clears existing command */
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{
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MCI_COMMAND(drive) = 0;
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mci_delay();
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}
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val = cmd | MCI_COMMAND_ENABLE;
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if(flags & MCI_RESP)
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{
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val |= MCI_COMMAND_RESPONSE;
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if(flags & MCI_LONG_RESP)
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val |= MCI_COMMAND_LONG_RESPONSE;
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}
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MCI_CLEAR(drive) = 0x7ff;
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MCI_ARGUMENT(drive) = (flags & MCI_ARG) ? arg : 0;
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MCI_COMMAND(drive) = val;
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while(MCI_STATUS(drive) & MCI_CMD_ACTIVE); /* wait for cmd completion */
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MCI_COMMAND(drive) = 0;
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MCI_ARGUMENT(drive) = ~0;
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status = MCI_STATUS(drive);
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MCI_CLEAR(drive) = 0x7ff;
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if(flags & MCI_RESP)
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{
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if(status & MCI_CMD_TIMEOUT)
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return false;
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else if(status & (MCI_CMD_CRC_FAIL /* FIXME? */ | MCI_CMD_RESP_END))
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{ /* resp received */
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if(flags & MCI_LONG_RESP)
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{
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/* store the response in reverse words order */
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response[0] = MCI_RESP3(drive);
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response[1] = MCI_RESP2(drive);
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response[2] = MCI_RESP1(drive);
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response[3] = MCI_RESP0(drive);
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}
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else
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response[0] = MCI_RESP0(drive);
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return true;
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}
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}
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else if(status & MCI_CMD_SENT)
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return true;
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return false;
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}
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static int sd_init_card(const int drive)
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{
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unsigned long response;
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long init_timeout;
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bool sd_v2 = false;
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unsigned long temp_reg[4];
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int i;
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/* 100 - 400kHz clock required for Identification Mode */
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MCI_CLOCK(drive) = (MCI_CLOCK(drive) & 0xf00) | AS3525_SD_IDENT_DIV;
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/* Start of Card Identification Mode ************************************/
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/* CMD0 Go Idle */
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if(!send_cmd(drive, SD_GO_IDLE_STATE, 0, MCI_NO_FLAGS, NULL))
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return -1;
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mci_delay();
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/* CMD8 Check for v2 sd card. Must be sent before using ACMD41
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Non v2 cards will not respond to this command*/
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if(send_cmd(drive, SD_SEND_IF_COND, 0x1AA, MCI_RESP|MCI_ARG, &response))
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if((response & 0xFFF) == 0x1AA)
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sd_v2 = true;
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/* timeout for initialization is 1sec, from SD Specification 2.00 */
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init_timeout = current_tick + HZ;
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do {
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/* timeout */
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if(TIME_AFTER(current_tick, init_timeout))
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return -2;
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/* app_cmd */
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if( !send_cmd(drive, SD_APP_CMD, 0, MCI_RESP|MCI_ARG, &response) )
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{
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return -3;
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}
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/* ACMD41 For v2 cards set HCS bit[30] & send host voltage range to all */
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if(!send_cmd(drive, SD_APP_OP_COND, (0x00FF8000 | (sd_v2 ? 1<<30 : 0)),
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MCI_RESP|MCI_ARG, &card_info[drive].ocr))
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{
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return -4;
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}
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} while(!(card_info[drive].ocr & (1<<31)));
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/* CMD2 send CID */
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if(!send_cmd(drive, SD_ALL_SEND_CID, 0, MCI_RESP|MCI_LONG_RESP|MCI_ARG,
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temp_reg))
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return -5;
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for(i=0; i<4; i++)
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card_info[drive].cid[3-i] = temp_reg[i];
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/* CMD3 send RCA */
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if(!send_cmd(drive, SD_SEND_RELATIVE_ADDR, 0, MCI_RESP|MCI_ARG,
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&card_info[drive].rca))
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return -6;
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/* End of Card Identification Mode ************************************/
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/* full speed for controller clock MCICLK = MCLK = PCLK = IDECLK = 62 MHz */
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MCI_CLOCK(drive) |= MCI_CLOCK_BYPASS; /* FIXME: 50 MHz is spec limit */
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mci_delay();
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#ifdef HAVE_MULTIDRIVE
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/* Try to switch V2 cards to HS timings, non HS seem to ignore this */
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if(sd_v2)
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{
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/* CMD7 w/rca: Select card to put it in TRAN state */
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if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
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return -7;
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if(sd_wait_for_state(drive, SD_TRAN))
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return -8;
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/* CMD6 */
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if(!send_cmd(drive, SD_SWITCH_FUNC, 0x80fffff1, MCI_ARG, NULL))
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return -9;
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mci_delay();
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/* go back to STBY state so we can read csd */
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/* CMD7 w/rca=0: Deselect card to put it in STBY state */
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if(!send_cmd(drive, SD_DESELECT_CARD, 0, MCI_ARG, NULL))
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return -10;
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}
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#endif /* HAVE_MULTIDRIVE */
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/* CMD9 send CSD */
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if(!send_cmd(drive, SD_SEND_CSD, card_info[drive].rca,
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MCI_RESP|MCI_LONG_RESP|MCI_ARG, temp_reg))
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return -11;
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for(i=0; i<4; i++)
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card_info[drive].csd[3-i] = temp_reg[i];
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sd_parse_csd(&card_info[drive]);
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/* CMD7 w/rca: Select card to put it in TRAN state */
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if(!send_cmd(drive, SD_SELECT_CARD, card_info[drive].rca, MCI_ARG, NULL))
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return -12;
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/*
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* enable bank switching
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* without issuing this command, we only have access to 1/4 of the blocks
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* of the first bank (0x1E9E00 blocks, which is the size reported in the
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* CSD register)
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*/
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if(drive == INTERNAL_AS3525)
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{
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const int ret = sd_select_bank(-1);
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if(ret < 0)
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return ret - 13;
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}
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card_info[drive].initialized = 1;
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return 0;
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}
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static void sd_thread(void) __attribute__((noreturn));
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static void sd_thread(void)
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{
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struct queue_event ev;
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bool idle_notified = false;
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while (1)
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{
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queue_wait_w_tmo(&sd_queue, &ev, HZ);
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switch ( ev.id )
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{
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#ifdef HAVE_HOTSWAP
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case SYS_HOTSWAP_INSERTED:
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case SYS_HOTSWAP_EXTRACTED:
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{
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int microsd_init = 1;
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fat_lock(); /* lock-out FAT activity first -
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prevent deadlocking via disk_mount that
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would cause a reverse-order attempt with
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another thread */
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mutex_lock(&sd_mtx); /* lock-out card activity - direct calls
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into driver that bypass the fat cache */
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/* We now have exclusive control of fat cache and ata */
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disk_unmount(SD_SLOT_AS3525); /* release "by force", ensure file
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descriptors aren't leaked and any busy
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ones are invalid if mounting */
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/* Force card init for new card, re-init for re-inserted one or
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* clear if the last attempt to init failed with an error. */
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card_info[SD_SLOT_AS3525].initialized = 0;
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if (ev.id == SYS_HOTSWAP_INSERTED)
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{
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sd_enable(true);
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init_pl180_controller(SD_SLOT_AS3525);
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microsd_init = sd_init_card(SD_SLOT_AS3525);
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if (microsd_init < 0) /* initialisation failed */
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panicf("microSD init failed : %d", microsd_init);
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microsd_init = disk_mount(SD_SLOT_AS3525); /* 0 if fail */
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}
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/*
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* Mount succeeded, or this was an EXTRACTED event,
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* in both cases notify the system about the changed filesystems
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*/
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if (microsd_init)
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queue_broadcast(SYS_FS_CHANGED, 0);
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/* Access is now safe */
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mutex_unlock(&sd_mtx);
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fat_unlock();
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sd_enable(false);
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}
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break;
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#endif
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case SYS_TIMEOUT:
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if (TIME_BEFORE(current_tick, last_disk_activity+(3*HZ)))
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{
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idle_notified = false;
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}
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else
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{
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/* never let a timer wrap confuse us */
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next_yield = current_tick;
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if (!idle_notified)
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{
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call_storage_idle_notifys(false);
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idle_notified = true;
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}
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}
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break;
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case SYS_USB_CONNECTED:
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usb_acknowledge(SYS_USB_CONNECTED_ACK);
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/* Wait until the USB cable is extracted again */
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usb_wait_for_disconnect(&sd_queue);
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break;
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case SYS_USB_DISCONNECTED:
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usb_acknowledge(SYS_USB_DISCONNECTED_ACK);
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break;
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}
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}
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}
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static void init_pl180_controller(const int drive)
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{
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MCI_COMMAND(drive) = MCI_DATA_CTRL(drive) = 0;
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MCI_CLEAR(drive) = 0x7ff;
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MCI_MASK0(drive) = MCI_ERROR | MCI_DATA_END;
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MCI_MASK1(drive) = 0;
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#ifdef HAVE_MULTIDRIVE
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VIC_INT_ENABLE |=
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(drive == INTERNAL_AS3525) ? INTERRUPT_NAND : INTERRUPT_MCI0;
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|
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/* setup isr for microsd monitoring */
|
|
VIC_INT_ENABLE |= (INTERRUPT_GPIOA);
|
|
/* clear previous irq */
|
|
GPIOA_IC = (1<<2);
|
|
/* enable edge detecting */
|
|
GPIOA_IS &= ~(1<<2);
|
|
/* detect both raising and falling edges */
|
|
GPIOA_IBE |= (1<<2);
|
|
|
|
#else
|
|
VIC_INT_ENABLE |= INTERRUPT_NAND;
|
|
#endif
|
|
|
|
MCI_POWER(drive) = MCI_POWER_UP | (MCI_VDD_3_0); /* OF Setting */
|
|
mci_delay();
|
|
|
|
MCI_POWER(drive) |= MCI_POWER_ON;
|
|
mci_delay();
|
|
|
|
MCI_SELECT(drive) = 0;
|
|
|
|
MCI_CLOCK(drive) = MCI_CLOCK_ENABLE;
|
|
mci_delay();
|
|
}
|
|
|
|
int sd_init(void)
|
|
{
|
|
int ret;
|
|
CGU_IDE = (1<<7) /* AHB interface enable */ |
|
|
(1<<6) /* interface enable */ |
|
|
(AS3525_IDE_DIV << 2) |
|
|
AS3525_CLK_PLLA; /* clock source = PLLA */
|
|
|
|
|
|
CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
|
|
#ifdef HAVE_MULTIDRIVE
|
|
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
|
|
CCU_IO &= ~(1<<3); /* bits 3:2 = 01, xpd is SD interface */
|
|
CCU_IO |= (1<<2);
|
|
#endif
|
|
|
|
wakeup_init(&transfer_completion_signal);
|
|
|
|
init_pl180_controller(INTERNAL_AS3525);
|
|
ret = sd_init_card(INTERNAL_AS3525);
|
|
if(ret < 0)
|
|
return ret;
|
|
#ifdef HAVE_MULTIDRIVE
|
|
init_pl180_controller(SD_SLOT_AS3525);
|
|
#endif
|
|
|
|
/* init mutex */
|
|
mutex_init(&sd_mtx);
|
|
|
|
queue_init(&sd_queue, true);
|
|
create_thread(sd_thread, sd_stack, sizeof(sd_stack), 0,
|
|
sd_thread_name IF_PRIO(, PRIORITY_USER_INTERFACE) IF_COP(, CPU));
|
|
|
|
#ifndef BOOTLOADER
|
|
sd_enabled = true;
|
|
sd_enable(false);
|
|
#endif
|
|
return 0;
|
|
}
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
bool sd_removable(IF_MD_NONVOID(int drive))
|
|
{
|
|
return (drive==1);
|
|
}
|
|
|
|
bool sd_present(IF_MD_NONVOID(int drive))
|
|
{
|
|
return (drive == 0) ? true : card_detect_target();
|
|
}
|
|
#endif /* HAVE_HOTSWAP */
|
|
|
|
static int sd_wait_for_state(const int drive, unsigned int state)
|
|
{
|
|
unsigned long response = 0;
|
|
unsigned int timeout = 100; /* ticks */
|
|
long t = current_tick;
|
|
|
|
while (1)
|
|
{
|
|
long tick;
|
|
|
|
if(!send_cmd(drive, SD_SEND_STATUS, card_info[drive].rca,
|
|
MCI_RESP|MCI_ARG, &response))
|
|
return -1;
|
|
|
|
if (((response >> 9) & 0xf) == state)
|
|
return 0;
|
|
|
|
if(TIME_AFTER(current_tick, t + timeout))
|
|
return -2;
|
|
|
|
if (TIME_AFTER((tick = current_tick), next_yield))
|
|
{
|
|
yield();
|
|
timeout += current_tick - tick;
|
|
next_yield = tick + MIN_YIELD_PERIOD;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int sd_select_bank(signed char bank)
|
|
{
|
|
int ret;
|
|
unsigned loops = 0;
|
|
|
|
do {
|
|
if(loops++ > PL180_MAX_TRANSFER_ERRORS)
|
|
panicf("SD bank %d error : 0x%x", bank,
|
|
transfer_error[INTERNAL_AS3525]);
|
|
|
|
ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
|
|
if (ret < 0)
|
|
return ret - 2;
|
|
|
|
if(!send_cmd(INTERNAL_AS3525, SD_SWITCH_FUNC, 0x80ffffef, MCI_ARG, NULL))
|
|
return -1;
|
|
|
|
mci_delay();
|
|
|
|
if(!send_cmd(INTERNAL_AS3525, 35, 0, MCI_NO_FLAGS, NULL))
|
|
return -2;
|
|
|
|
mci_delay();
|
|
|
|
memset(uncached_buffer, 0, 512);
|
|
if(bank == -1)
|
|
{ /* enable bank switching */
|
|
uncached_buffer[0] = 16;
|
|
uncached_buffer[1] = 1;
|
|
uncached_buffer[2] = 10;
|
|
}
|
|
else
|
|
uncached_buffer[0] = bank;
|
|
|
|
dma_retain();
|
|
/* we don't use the uncached buffer here, because we need the
|
|
* physical memory address for DMA transfers */
|
|
dma_enable_channel(0, aligned_buffer, MCI_FIFO(INTERNAL_AS3525),
|
|
DMA_PERI_SD, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8,
|
|
NULL);
|
|
|
|
MCI_DATA_TIMER(INTERNAL_AS3525) = ((AS3525_IDE_FREQ) / 1000 * 250) /* 250 ms */;
|
|
MCI_DATA_LENGTH(INTERNAL_AS3525) = 512;
|
|
MCI_DATA_CTRL(INTERNAL_AS3525) = (1<<0) /* enable */ |
|
|
(0<<1) /* transfer direction */ |
|
|
(1<<3) /* DMA */ |
|
|
(9<<4) /* 2^9 = 512 */ ;
|
|
|
|
wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
|
|
|
|
/* Wait for FIFO to empty */
|
|
while(MCI_STATUS(INTERNAL_AS3525) & (MCI_TX_ACTIVE | MCI_RX_ACTIVE));
|
|
|
|
dma_release();
|
|
|
|
ret = sd_wait_for_state(INTERNAL_AS3525, SD_TRAN);
|
|
if (ret < 0)
|
|
return ret - 4;
|
|
} while(transfer_error[INTERNAL_AS3525]);
|
|
|
|
card_info[INTERNAL_AS3525].current_bank = (bank == -1) ? 0 : bank;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
|
|
int count, void* buf, const bool write)
|
|
{
|
|
#ifndef HAVE_MULTIDRIVE
|
|
const int drive = 0;
|
|
#endif
|
|
int ret = 0;
|
|
unsigned loops = 0;
|
|
|
|
/* skip SanDisk OF */
|
|
if (drive == INTERNAL_AS3525)
|
|
start += AMS_OF_SIZE;
|
|
|
|
mutex_lock(&sd_mtx);
|
|
#ifndef BOOTLOADER
|
|
sd_enable(true);
|
|
led(true);
|
|
#endif
|
|
|
|
if (card_info[drive].initialized <= 0)
|
|
{
|
|
ret = sd_init_card(drive);
|
|
if (!(card_info[drive].initialized))
|
|
goto sd_transfer_error;
|
|
}
|
|
|
|
last_disk_activity = current_tick;
|
|
|
|
ret = sd_wait_for_state(drive, SD_TRAN);
|
|
if (ret < 0)
|
|
{
|
|
ret -= 20;
|
|
goto sd_transfer_error;
|
|
}
|
|
|
|
dma_retain();
|
|
|
|
while(count)
|
|
{
|
|
/* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH
|
|
* register, so we have to transfer maximum 127 sectors at a time. */
|
|
unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */
|
|
void *dma_buf;
|
|
const int cmd =
|
|
write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK;
|
|
unsigned long bank_start = start;
|
|
|
|
/* Only switch banks for internal storage */
|
|
if(drive == INTERNAL_AS3525)
|
|
{
|
|
unsigned int bank = start / BLOCKS_PER_BANK; /* Current bank */
|
|
|
|
/* Switch bank if needed */
|
|
if(card_info[INTERNAL_AS3525].current_bank != bank)
|
|
{
|
|
ret = sd_select_bank(bank);
|
|
if (ret < 0)
|
|
{
|
|
ret -= 2*20;
|
|
goto sd_transfer_error;
|
|
}
|
|
}
|
|
|
|
/* Adjust start block in current bank */
|
|
bank_start -= bank * BLOCKS_PER_BANK;
|
|
|
|
/* Do not cross a bank boundary in a single transfer loop */
|
|
if((transfer + bank_start) > BLOCKS_PER_BANK)
|
|
transfer = BLOCKS_PER_BANK - bank_start;
|
|
}
|
|
|
|
dma_buf = aligned_buffer;
|
|
if(transfer > UNALIGNED_NUM_SECTORS)
|
|
transfer = UNALIGNED_NUM_SECTORS;
|
|
if(write)
|
|
memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE);
|
|
|
|
/* Set bank_start to the correct unit (blocks or bytes) */
|
|
if(!(card_info[drive].ocr & (1<<30))) /* not SDHC */
|
|
bank_start *= SD_BLOCK_SIZE;
|
|
|
|
if(!send_cmd(drive, cmd, bank_start, MCI_ARG, NULL))
|
|
{
|
|
ret -= 3*20;
|
|
goto sd_transfer_error;
|
|
}
|
|
|
|
if(write)
|
|
dma_enable_channel(0, dma_buf, MCI_FIFO(drive),
|
|
(drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
|
|
DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL);
|
|
else
|
|
dma_enable_channel(0, MCI_FIFO(drive), dma_buf,
|
|
(drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT,
|
|
DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL);
|
|
|
|
/* FIXME : we should check if the timeouts calculated from the card's
|
|
* CSD are lower, and use them if it is the case
|
|
* Note : the OF doesn't seem to use them anyway */
|
|
MCI_DATA_TIMER(drive) = write ?
|
|
SD_MAX_WRITE_TIMEOUT : SD_MAX_READ_TIMEOUT;
|
|
MCI_DATA_LENGTH(drive) = transfer * card_info[drive].blocksize;
|
|
MCI_DATA_CTRL(drive) = (1<<0) /* enable */ |
|
|
(!write<<1) /* transfer direction */ |
|
|
(1<<3) /* DMA */ |
|
|
(9<<4) /* 2^9 = 512 */ ;
|
|
|
|
|
|
wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK);
|
|
|
|
/* Wait for FIFO to empty */
|
|
while(MCI_STATUS(drive) & (MCI_TX_ACTIVE | MCI_RX_ACTIVE));
|
|
|
|
if(!transfer_error[drive])
|
|
{
|
|
if(!write)
|
|
memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE);
|
|
buf += transfer * SECTOR_SIZE;
|
|
start += transfer;
|
|
count -= transfer;
|
|
loops = 0; /* reset errors counter */
|
|
}
|
|
else if(loops++ > PL180_MAX_TRANSFER_ERRORS)
|
|
panicf("SD transfer error : 0x%x", transfer_error[drive]);
|
|
|
|
last_disk_activity = current_tick;
|
|
|
|
if(!send_cmd(drive, SD_STOP_TRANSMISSION, 0, MCI_NO_FLAGS, NULL))
|
|
{
|
|
ret = -4*20;
|
|
goto sd_transfer_error;
|
|
}
|
|
|
|
ret = sd_wait_for_state(drive, SD_TRAN);
|
|
if (ret < 0)
|
|
{
|
|
ret -= 5*20;
|
|
goto sd_transfer_error;
|
|
}
|
|
}
|
|
|
|
ret = 0; /* success */
|
|
|
|
sd_transfer_error:
|
|
|
|
dma_release();
|
|
|
|
#ifndef BOOTLOADER
|
|
led(false);
|
|
sd_enable(false);
|
|
#endif
|
|
|
|
if (ret) /* error */
|
|
card_info[drive].initialized = 0;
|
|
|
|
mutex_unlock(&sd_mtx);
|
|
return ret;
|
|
}
|
|
|
|
int sd_read_sectors(IF_MD2(int drive,) unsigned long start, int count,
|
|
void* buf)
|
|
{
|
|
return sd_transfer_sectors(IF_MD2(drive,) start, count, buf, false);
|
|
}
|
|
|
|
int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
|
|
const void* buf)
|
|
{
|
|
|
|
#ifdef BOOTLOADER /* we don't need write support in bootloader */
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void) drive;
|
|
#endif
|
|
(void) start;
|
|
(void) count;
|
|
(void) buf;
|
|
return -1;
|
|
#else
|
|
return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
|
|
#endif
|
|
}
|
|
|
|
#ifndef BOOTLOADER
|
|
long sd_last_disk_activity(void)
|
|
{
|
|
return last_disk_activity;
|
|
}
|
|
|
|
void sd_enable(bool on)
|
|
{
|
|
/* buttonlight AMSes need a bit of special handling for the buttonlight here
|
|
* due to the dual mapping of GPIOD and XPD */
|
|
#if defined(HAVE_BUTTON_LIGHT) && defined(HAVE_MULTIDRIVE)
|
|
extern int buttonlight_is_on;
|
|
#endif
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
static bool cpu_boosted = false;
|
|
#endif
|
|
|
|
if (sd_enabled == on)
|
|
return; /* nothing to do */
|
|
if(on)
|
|
{
|
|
CGU_PERI |= CGU_NAF_CLOCK_ENABLE;
|
|
#ifdef HAVE_MULTIDRIVE
|
|
CGU_PERI |= CGU_MCI_CLOCK_ENABLE;
|
|
#ifdef HAVE_BUTTON_LIGHT
|
|
CCU_IO |= (1<<2);
|
|
if (buttonlight_is_on)
|
|
GPIOD_DIR &= ~(1<<7);
|
|
else
|
|
_buttonlight_off();
|
|
#endif /* HAVE_BUTTON_LIGHT */
|
|
#endif /* HAVE_MULTIDRIVE */
|
|
CGU_IDE |= (1<<7) /* AHB interface enable */ |
|
|
(1<<6) /* interface enable */;
|
|
sd_enabled = true;
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
if(card_detect_target()) /* If SD card present Boost cpu for voltage */
|
|
{
|
|
cpu_boosted = true;
|
|
cpu_boost(true);
|
|
}
|
|
#endif
|
|
}
|
|
else
|
|
{
|
|
CGU_PERI &= ~CGU_NAF_CLOCK_ENABLE;
|
|
#ifdef HAVE_MULTIDRIVE
|
|
#ifdef HAVE_BUTTON_LIGHT
|
|
CCU_IO &= ~(1<<2);
|
|
if (buttonlight_is_on)
|
|
_buttonlight_on();
|
|
#endif /* HAVE_BUTTON_LIGHT */
|
|
CGU_PERI &= ~CGU_MCI_CLOCK_ENABLE;
|
|
#endif /* HAVE_MULTIDRIVE */
|
|
CGU_IDE &= ~((1<<7)|(1<<6));
|
|
sd_enabled = false;
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
if(cpu_boosted)
|
|
{
|
|
cpu_boost(false);
|
|
cpu_boosted = false;
|
|
}
|
|
#endif
|
|
}
|
|
}
|
|
|
|
tCardInfo *card_get_info_target(int card_no)
|
|
{
|
|
return &card_info[card_no];
|
|
}
|
|
|
|
bool card_detect_target(void)
|
|
{
|
|
#if defined(HAVE_MULTIDRIVE)
|
|
return !(GPIOA_PIN(2));
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
|
|
#ifdef HAVE_HOTSWAP
|
|
void card_enable_monitoring_target(bool on)
|
|
{
|
|
if (on) /* enable interrupt */
|
|
GPIOA_IE |= (1<<2);
|
|
else /* disable interrupt */
|
|
GPIOA_IE &= ~(1<<2);
|
|
}
|
|
#endif /* HAVE_HOTSWAP */
|
|
|
|
#endif /* !BOOTLOADER */
|
|
|
|
#ifdef CONFIG_STORAGE_MULTI
|
|
int sd_num_drives(int first_drive)
|
|
{
|
|
/* We don't care which logical drive number(s) we have been assigned */
|
|
(void)first_drive;
|
|
|
|
return NUM_DRIVES;
|
|
}
|
|
#endif /* CONFIG_STORAGE_MULTI */
|