f3cce72269
Now that we now that jz4760b implements EBASE, we can use it to rebase exceptions to use a k1seg address, that maps to the physical address of the TCSM0. It requires to enable HAB1 to have this translation. This most the most inefficient way to access tighly coupled memory ever, but it works. Change-Id: I894ca929c9835696102eb2fef44b06e6eaf96d44
18 lines
524 B
C
18 lines
524 B
C
#define CONFIG_JZ4760B
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#define TCSM0_ORIG 0xf4000000
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#define TCSM0_SIZE 0x4000
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#define TCSM0_UNCACHED_ADDRESS 0xb32b0000
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#define CPU_MIPS
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#define STACK_SIZE 0x300
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#define DCACHE_SIZE 0x4000 /* 16 kB */
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#define DCACHE_LINE_SIZE 0x20 /* 32 B */
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#define ICACHE_SIZE 0x4000 /* 16 kB */
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#define ICACHE_LINE_SIZE 0x20 /* 32 B */
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/* we need to flush caches before executing */
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#define CONFIG_FLUSH_CACHES
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/* something provides define
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* #define mips 1
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* which breaks paths badly
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*/
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#undef mips
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