0662793ca0
Cleaned up, rebased, and forward-ported from the xvortex fork. (original credit to vsoftster@gmail.com) Change-Id: Ibcc023a0271ea81e901450a88317708c2683236d Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
53 lines
1.6 KiB
C
53 lines
1.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2016 by Roman Stolyarov
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "kernel.h"
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#include "cpu.h"
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void tick_start(unsigned int interval_in_ms)
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{
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unsigned int latch;
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/* 12Mhz / 4 = 3Mhz */
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latch = interval_in_ms*1000 * 3;
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REG_OST_OSTCSR = OSTCSR_PRESCALE4 | OSTCSR_EXT_EN;
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REG_OST_OSTDR = latch;
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REG_OST_OSTCNTL = 0;
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REG_OST_OSTCNTH = 0;
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system_enable_irq(IRQ_TCU0);
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REG_TCU_TMCR = TMCR_OSTMASK; /* unmask match irq */
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REG_TCU_TSCR = TSCR_OST; /* enable timer clock */
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REG_TCU_TESR = TESR_OST; /* start counting up */
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}
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/* Interrupt handler */
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void TCU0(void)
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{
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REG_TCU_TFCR = TFCR_OSTFLAG; /* ACK timer */
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/* Run through the list of tick tasks */
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call_tick_tasks();
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}
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