eb90d95693
- enable MMU -rework lcd frame buffer - add rtc/adc/power stubs (or not) - fix a few MMC related defines (hopefully) - implement cache handling for DMA - more SD work - add keymap (based on clip) - add virtual buttons - update linker scripts - big step toward apps actually compiling git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30200 a1c6a512-1295-4272-9138-f99709370657
179 lines
5.9 KiB
C
179 lines
5.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by amaury Pouly
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*
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* Based on Rockbox iriver bootloader by Linus Nielsen Feltzing
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* and the ipodlinux bootloader by Daniel Palffy and Bernard Leach
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "dma-imx233.h"
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void imx233_dma_init(void)
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{
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/* Enable APHB and APBX */
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__REG_CLR(HW_APBH_CTRL0) = __BLOCK_CLKGATE | __BLOCK_SFTRST;
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__REG_CLR(HW_APBX_CTRL0) = __BLOCK_CLKGATE | __BLOCK_SFTRST;
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}
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void imx233_dma_reset_channel(unsigned chan)
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{
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if(APB_IS_APBX_CHANNEL(chan))
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__REG_SET(HW_APBX_CHANNEL_CTRL) =
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HW_APBX_CHANNEL_CTRL__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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else
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__REG_SET(HW_APBH_CTRL0) =
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HW_APBH_CTRL0__RESET_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
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{
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if(APB_IS_APBX_CHANNEL(chan))
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return;
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if(enable_clock)
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__REG_CLR(HW_APBH_CTRL0) =
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HW_APBH_CTRL0__CLKGATE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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else
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__REG_SET(HW_APBH_CTRL0) =
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HW_APBH_CTRL0__CLKGATE_CHANNEL(APB_GET_DMA_CHANNEL(chan));
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}
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void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
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{
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volatile uint32_t *ptr;
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uint32_t bm;
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if(APB_IS_APBX_CHANNEL(chan))
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{
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ptr = &HW_APBX_CTRL1;
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bm = HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ_EN(APB_GET_DMA_CHANNEL(chan));
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}
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else
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{
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ptr = &HW_APBH_CTRL1;;
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bm = HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ_EN(APB_GET_DMA_CHANNEL(chan));
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}
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if(enable)
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{
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__REG_SET(*ptr) = bm;
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imx233_dma_clear_channel_interrupt(chan);
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}
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else
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__REG_CLR(*ptr) = bm;
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}
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void imx233_dma_clear_channel_interrupt(unsigned chan)
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{
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if(APB_IS_APBX_CHANNEL(chan))
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{
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__REG_CLR(HW_APBX_CTRL1) =
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HW_APBX_CTRL1__CHx_CMDCMPLT_IRQ(APB_GET_DMA_CHANNEL(chan));
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__REG_CLR(HW_APBX_CTRL2) =
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HW_APBX_CTRL2__CHx_ERROR_IRQ(APB_GET_DMA_CHANNEL(chan));
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}
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else
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{
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__REG_CLR(HW_APBH_CTRL1) =
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HW_APBH_CTRL1__CHx_CMDCMPLT_IRQ(APB_GET_DMA_CHANNEL(chan));
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__REG_CLR(HW_APBH_CTRL2) =
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HW_APBH_CTRL2__CHx_ERROR_IRQ(APB_GET_DMA_CHANNEL(chan));
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}
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}
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bool imx233_dma_is_channel_error_irq(unsigned chan)
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{
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if(APB_IS_APBX_CHANNEL(chan))
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return !!(HW_APBX_CTRL2 &
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HW_APBX_CTRL2__CHx_ERROR_IRQ(APB_GET_DMA_CHANNEL(chan)));
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else
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return !!(HW_APBH_CTRL2 &
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HW_APBH_CTRL2__CHx_ERROR_IRQ(APB_GET_DMA_CHANNEL(chan)));
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}
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/* Commit and/or discard all DMA descriptors and buffers pointed by them,
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* handle circular lists */
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static void imx233_dma_commit_and_discard(struct apb_dma_command_t *cmd)
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{
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/* We handle circular descriptors by using unused bits:
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* bits 8-11 are not used by the hardware so we first go through the whole
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* list and mark them all a special value at the same time we commit buffers
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* and then we go through the list another time to clear the mark and
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* commit the descriptors */
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struct apb_dma_command_t *cur = cmd;
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while((cur->cmd & HW_APB_CHx_CMD__UNUSED_BM) != HW_APB_CHx_CMD__UNUSED_MAGIC)
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{
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cur->cmd = (cur->cmd & ~HW_APB_CHx_CMD__UNUSED_BM) | HW_APB_CHx_CMD__UNUSED_MAGIC;
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int op = cur->cmd & HW_APB_CHx_CMD__COMMAND_BM;
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int sz = (cur->cmd & HW_APB_CHx_CMD__XFER_COUNT_BM) >> HW_APB_CHx_CMD__XFER_COUNT_BP;
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/* device > host: discard */
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if(op == HW_APB_CHx_CMD__COMMAND__WRITE)
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discard_dcache_range(cur->buffer, sz);
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/* host > device: commit and discard */
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else if(op == HW_APB_CHx_CMD__COMMAND__READ)
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commit_discard_dcache_range(cur->buffer, sz);
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/* chain ? */
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if(cur->cmd & HW_APB_CHx_CMD__CHAIN)
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cur = cur->next;
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else
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break;
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}
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cur = cmd;
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while((cur->cmd & HW_APB_CHx_CMD__UNUSED_BM) != 0)
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{
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cur->cmd = cur->cmd & ~HW_APB_CHx_CMD__UNUSED_BM;
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int sz = (cur->cmd & HW_APB_CHx_CMD__CMDWORDS_BM) >> HW_APB_CHx_CMD__CMDWORDS_BP;
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/* commit descriptor (don't discard since we access it after) */
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commit_dcache_range(cur,
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sizeof(struct apb_dma_command_t) + sizeof(uint32_t) * sz);
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/* chain ? */
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if(cur->cmd & HW_APB_CHx_CMD__CHAIN)
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cur = cur->next;
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else
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break;
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}
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}
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void imx233_dma_start_command(unsigned chan, struct apb_dma_command_t *cmd)
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{
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imx233_dma_commit_and_discard(cmd);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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HW_APBX_CHx_NXTCMDAR(APB_GET_DMA_CHANNEL(chan)) = (uint32_t)cmd;
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HW_APBX_CHx_SEMA(APB_GET_DMA_CHANNEL(chan)) = 1;
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}
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else
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{
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HW_APBH_CHx_NXTCMDAR(APB_GET_DMA_CHANNEL(chan)) = (uint32_t)cmd;
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HW_APBH_CHx_SEMA(APB_GET_DMA_CHANNEL(chan)) = 1;
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}
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}
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void imx233_dma_wait_completion(unsigned chan)
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{
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volatile uint32_t *sema;
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if(APB_IS_APBX_CHANNEL(chan))
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sema = &HW_APBX_CHx_SEMA(APB_GET_DMA_CHANNEL(chan));
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else
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sema = &HW_APBH_CHx_SEMA(APB_GET_DMA_CHANNEL(chan));
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while(*sema & HW_APB_CHx_SEMA__PHORE_BM)
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yield();
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}
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