45711ac286
Reorder system_init() to initialize peripherals not only in bootloader Use a 65MHz PCLK (and memclk) which will be needed for realtime decoding git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19330 a1c6a512-1295-4272-9138-f99709370657
64 lines
2 KiB
C
64 lines
2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef CLOCK_TARGET_H
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#define CLOCK_TARGET_H
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/* PLL */
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#define AS3525_PLLA_FREQ 248000000
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#define AS3525_PLLA_SETTING 0x261F
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/* CPU */
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/* ensure that PLLA_FREQ * prediv == CPUFREQ_MAX */
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#define AS3525_CPU_PREDIV 0 /* div = 1/1 */
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#define CPUFREQ_MAX 248000000
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#define CPUFREQ_DEFAULT 24800000
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#define CPUFREQ_NORMAL 31000000
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/* peripherals */
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#define AS3525_PCLK_FREQ 65000000
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#define AS3525_IDE_FREQ 90000000
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#define AS3525_SD_IDENT_FREQ 400000 /* must be between 100 & 400 kHz */
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#define AS3525_I2C_FREQ 400000
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/* LCD controller : varies on the models */
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#if defined(SANSA_CLIP)
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#define AS3525_DBOP_FREQ 6000000
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#elif defined(SANSA_M200V4)
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#define AS3525_DBOP_FREQ 8000000
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#elif defined(SANSA_FUZE)
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#define AS3525_DBOP_FREQ 24000000
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#elif defined(SANSA_E200V2)
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#define AS3525_DBOP_FREQ 8000000
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#endif
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/* macro for not giving a target clock > at the one provided */
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#define CLK_DIV(ref, target) ((ref + target - 1) / target)
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#endif /* CLOCK_TARGET_H */
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