rockbox/firmware/target/mips/ingenic_x1000/x1000
Aidan MacDonald 7a5130a277 x1000: fix broken OST2 timer prescaler
It turns out the prescaler fields in OST_CTRL are 2 bits wide,
not 3. The programming manual (as usual) is ambiguous and its
diagram shows 2-bit wide fields, but the bit positions in the
text give a 3-bit wide field. Ingenic's Linux code and my own
testing shows that they are, in fact, 2 bits wide.

This caused the OST2 divisor to be 16 instead of 4; the OST1
divisor was correct. This means that all udelay/mdelay calls
took 4x longer than they should've. After this change the OST2
prescaler will be 4, as intended, and udelay/mdelay calls will
wait for the intended duration.

Change-Id: I2ac0a9190f49b59a840c649bf586131f5f9fde82
2021-10-16 16:58:19 -04:00
..
aic.h x1000: refactor AIC initialization 2021-05-30 19:17:50 +00:00
cpm.h x1000: more CPM register definitions 2021-07-08 16:01:38 +00:00
ddrc.h
ddrc_apb.h
ddrphy.h
dma.h
dma_chn.h
efuse.h x1000: Complete the register definitions 2021-05-29 16:34:32 +01:00
gpio.h
i2c.h
intc.h
lcd.h
macro.h
msc.h
ost.h x1000: fix broken OST2 timer prescaler 2021-10-16 16:58:19 -04:00
pcm.h x1000: Complete the register definitions 2021-05-29 16:34:32 +01:00
rtc.h
sfc.h
ssi.h x1000: Complete the register definitions 2021-05-29 16:34:32 +01:00
tcu.h
uart.h x1000: Complete the register definitions 2021-05-29 16:34:32 +01:00
wdt.h