rockbox/firmware/target/arm/iriver
Robert Kukla feb3b588e3 explicitly align the ibss section by adjusting _iramend - fixes hang on m:robe (and potential problem on other arm targets)
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17024 a1c6a512-1295-4272-9138-f99709370657
2008-04-07 18:24:23 +00:00
..
h10 Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit). 2008-04-06 04:34:57 +00:00
app.lds explicitly align the ibss section by adjusting _iramend - fixes hang on m:robe (and potential problem on other arm targets) 2008-04-07 18:24:23 +00:00
backlight-target.h Hardware controlled backlight brightness for iPod Video and Nano, retaining the software PWM fade in/ fade out. * Backlight handling cleanup, getting rid of one layer of 'lowlevelness'. * Use atomic GPIO bit manipulation for PP502x backlight handling. 2007-11-12 18:49:53 +00:00
boot.lds Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit). 2008-04-06 04:34:57 +00:00
usb-target.h