b7f7655dc2
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20442 a1c6a512-1295-4272-9138-f99709370657
124 lines
4.5 KiB
C
124 lines
4.5 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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* Physical interface of the SI4700 in the Gigabeat S
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*
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* Copyright (C) 2008 by Nils Wallménius
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "mc13783.h"
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#include "i2c-imx31.h"
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#include "fmradio_i2c.h"
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static struct i2c_node si4700_i2c_node =
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{
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.num = I2C2_NUM,
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.ifdr = I2C_IFDR_DIV192, /* 66MHz/.4MHz = 165, closest = 192 = 343750Hz */
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/* Just hard-code for now - scaling may require
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* updating */
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.addr = (0x20),
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};
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void fmradio_i2c_init(void)
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{
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/* RST: LOW */
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imx31_regclr32(&GPIO1_DR, (1 << 26));
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/* RST: OUT */
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imx31_regset32(&GPIO1_GDIR, (1 << 26));
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/* I2C2 SCL: IN, I2C2: SDA IN */
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imx31_regclr32(&GPIO2_GDIR, (3 << 14));
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/* I2C2 SCL LO, I2C2 SDA LO */
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imx31_regclr32(&GPIO2_DR, (3 << 14));
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/* open-drain pins - external pullups on PCB. Pullup default but
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* disabled */
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imx31_regmod32(&SW_PAD_CTL_DSR_DTE1_RI_DTE1_DCD_DTE1,
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/* RI_DTE1 (I2C2_SCLK) */
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((SW_PAD_CTL_PUE_PKE_DISABLE | SW_PAD_CTL_PUS_UP_100K |
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SW_PAD_CTL_HYS | SW_PAD_CTL_ODE) << SW_PAD_CTL_IO2_POS) |
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/* DCD_DTE1 (I2C2_SDA) */
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((SW_PAD_CTL_PUE_PKE_DISABLE | SW_PAD_CTL_PUS_UP_100K |
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SW_PAD_CTL_HYS | SW_PAD_CTL_ODE) << SW_PAD_CTL_IO1_POS),
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SW_PAD_CTL_IO2 | SW_PAD_CTL_IO1);
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/* set outputs to I2C2 */
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imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2,
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/* RI_DTE1 => I2C2_SCLK */
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((SW_MUX_OUT_ALT2 | SW_MUX_IN_ALT2) << SW_MUX_CTL_SIG4_POS) |
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/* DCD_DTE1 => I2C2_SDA */
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((SW_MUX_OUT_ALT2 | SW_MUX_IN_ALT2) << SW_MUX_CTL_SIG3_POS),
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SW_MUX_CTL_SIG4 | SW_MUX_CTL_SIG3);
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}
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void fmradio_i2c_enable(bool enable)
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{
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if (enable)
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{
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uint32_t io_pin_mux = SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2;
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/* place in GPIO mode to hold SDIO low during RESET release,
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* SEN1 should be high already (pullup) and GPIO3 left alone */
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imx31_regset32(&GPIO2_GDIR, (1 << 15)); /* SDIO OUT */
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/* I2C2_SDA => MCU2_15 */
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imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2,
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(SW_MUX_OUT_GPIO_DR |
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SW_MUX_IN_GPIO_PSR_ISR) << SW_MUX_CTL_SIG3_POS,
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SW_MUX_CTL_SIG3);
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/* enable CLK32KMCU clock */
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mc13783_set(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
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/* enable the fm chip (release RESET) */
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imx31_regset32(&GPIO1_DR, (1 << 26));
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sleep(HZ/100);
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/* busmode should be selected - OK to release SDIO */
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imx31_regclr32(&GPIO2_GDIR, (1 << 15)); /* SDIO IN */
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/* restore pin mux (DCD_DTE1 => I2C2_SDA) */
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imx31_regmod32(&SW_MUX_CTL_RI_DTE1_DCD_DTE1_DTR_DCE2_RXD2,
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io_pin_mux, SW_MUX_CTL_SIG3);
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/* the si4700 is the only thing connected to i2c2 so
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we can diable the i2c module when not in use */
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i2c_enable_node(&si4700_i2c_node, true);
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}
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else
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{
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/* the si4700 is the only thing connected to i2c2 so
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we can diable the i2c module when not in use */
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i2c_enable_node(&si4700_i2c_node, false);
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/* disable the fm chip */
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imx31_regclr32(&GPIO1_DR, (1 << 26));
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/* disable CLK32KMCU clock */
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mc13783_clear(MC13783_POWER_CONTROL0, MC13783_CLK32KMCUEN);
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}
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}
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int fmradio_i2c_write(unsigned char address, const unsigned char* buf, int count)
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{
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(void)address;
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i2c_write(&si4700_i2c_node, buf, count);
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return 0;
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}
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int fmradio_i2c_read(unsigned char address, unsigned char* buf, int count)
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{
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(void)address;
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i2c_read(&si4700_i2c_node, -1, buf, count);
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return 0;
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}
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int si4700_st(void)
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{
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return (GPIO1_DR & (1 << 28)) >> 28;
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}
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