a07c034de7
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16243 a1c6a512-1295-4272-9138-f99709370657
55 lines
1.6 KiB
C
55 lines
1.6 KiB
C
#include "config.h"
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#include "system.h"
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#include "avic-imx31.h"
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#include "kernel.h"
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#include "thread.h"
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#include <stdio.h>
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extern void (*tick_funcs[MAX_NUM_TICK_TASKS])(void);
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static __attribute__((interrupt("IRQ"))) void EPIT1_HANDLER(void)
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{
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int i;
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EPITSR1 = 1; /* Clear the pending status */
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/* Run through the list of tick tasks */
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for(i = 0;i < MAX_NUM_TICK_TASKS;i++)
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{
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if(tick_funcs[i])
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tick_funcs[i]();
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}
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current_tick++;
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}
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void tick_start(unsigned int interval_in_ms)
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{
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CLKCTL_CGR0 |= (3 << 6); /* EPIT1 module clock ON - before writing regs! */
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EPITCR1 &= ~((1 << 2) | (1 << 0)); /* Disable the counter */
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CLKCTL_WIMR0 &= ~(1 << 23); /* Clear wakeup mask */
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/* NOTE: This isn't really accurate yet but it's close enough to work
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* with for the moment */
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/* CLKSRC=32KHz, EPIT Output Disconnected, Enabled
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* prescale 1/32, Reload from modulus register, Compare interrupt enabled,
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* Count from load value */
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EPITCR1 = (3 << 24) | (1 << 19) | (32 << 4) |
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(1 << 3) | (1 << 2) | (1 << 1);
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EPITLR1 = interval_in_ms; /* Count down from interval */
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EPITCMPR1 = 0; /* Event when counter reaches 0 */
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EPITSR1 = 1; /* Clear any pending interrupt */
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avic_enable_int(EPIT1, IRQ, 7, EPIT1_HANDLER);
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EPITCR1 |= (1 << 0); /* Enable the counter */
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}
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#ifdef BOOTLOADER
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void tick_stop(void)
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{
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avic_disable_int(EPIT1); /* Disable insterrupt */
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EPITCR1 &= ~((1 << 2) | (1 << 0)); /* Disable counter */
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CLKCTL_CGR0 &= ~(3 << 6); /* EPIT1 module clock OFF */
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}
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#endif
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