d405026ca8
Change-Id: I46dca69c6708d3e6189f66e70badf0a594bac00b
96 lines
2.8 KiB
C
96 lines
2.8 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2014 by Cástor Muñoz
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "serial.h"
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#include "s5l8700.h"
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#include "uc870x.h"
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/* Define LOGF_ENABLE to enable logf output in this file */
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#define LOGF_ENABLE
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#include "logf.h"
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/* shall include serial HW configuracion for specific target */
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#define NANO2G_UART_CLK_HZ 24000000 /* external OSC0 ??? */
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/* This values below are valid with a UCLK of 24MHz */
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#define BRDATA_9600 (155) /* 9615 */
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#define BRDATA_19200 (77) /* 19231 */
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#define BRDATA_28800 (51) /* 28846 */
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#define BRDATA_38400 (38) /* 38462 */
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#define BRDATA_57600 (25) /* 57692 */
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#define BRDATA_115200 (12) /* 115385 */
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extern const struct uartc s5l8701_uartc0;
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struct uartc_port ser_port IDATA_ATTR =
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{
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/* location */
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.uartc = &s5l8701_uartc0,
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.id = 0,
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/* configuration */
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.rx_trg = UFCON_RX_FIFO_TRG_4,
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.tx_trg = UFCON_TX_FIFO_TRG_EMPTY,
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.clksel = UCON_CLKSEL_ECLK,
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.clkhz = NANO2G_UART_CLK_HZ,
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/* interrupt callbacks */
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.rx_cb = NULL,
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.tx_cb = NULL, /* polling */
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};
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/*
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* serial driver API
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*/
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void serial_setup(void)
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{
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uartc_port_open(&ser_port);
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/* set a default configuration, Tx and Rx modes are
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disabled when the port is initialized */
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uartc_port_config(&ser_port, ULCON_DATA_BITS_8,
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ULCON_PARITY_NONE, ULCON_STOP_BITS_1);
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uartc_port_set_bitrate_raw(&ser_port, BRDATA_115200);
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/* enable Tx interrupt request or POLLING mode */
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uartc_port_set_tx_mode(&ser_port, UCON_MODE_INTREQ);
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logf("[%lu] "MODEL_NAME" port %d ready!",
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(uint32_t)USEC_TIMER, ser_port.id);
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}
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int tx_rdy(void)
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{
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return uartc_port_tx_ready(&ser_port) ? 1 : 0;
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}
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void tx_writec(unsigned char c)
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{
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uartc_port_tx_byte(&ser_port, c);
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}
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