343 lines
8.2 KiB
Text
343 lines
8.2 KiB
Text
#include "config.h"
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/* These output formats should be in the config-files */
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#ifdef CPU_COLDFIRE
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OUTPUT_FORMAT(elf32-m68k)
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#elif defined(CPU_ARM)
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OUTPUT_FORMAT(elf32-littlearm)
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#elif defined(CPU_SH)
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OUTPUT_FORMAT(elf32-sh)
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#elif defined(CPU_MIPS)
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OUTPUT_FORMAT(elf32-littlemips)
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#else
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/* We can have an #error here we don't use this file when build sims! */
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#error Unknown CPU architecture
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#endif
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#ifdef DEBUG
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#define STUBOFFSET 0x10000
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#else
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#define STUBOFFSET 0
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#endif
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#if defined(CPU_PP)
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#ifdef CPU_PP502x
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#define NOCACHE_BASE 0x10000000
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#else
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#define NOCACHE_BASE 0x28000000
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#endif /* CPU_* */
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#define CACHEALIGN_SIZE 16
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#endif /* CPU_PP */
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#if CONFIG_CPU==IMX31L
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/* No fudges! */
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#include "imx31l.h"
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#define DRAMSIZE ((MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE \
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- CODEC_SIZE - QHARRAY_SIZE - FRAME_SIZE - TTB_SIZE)
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#elif CONFIG_CPU==DM320
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/* Give this 1 meg to allow it to align to the MMU boundary */
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#ifndef LCD_NATIVE_WIDTH
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#define LCD_NATIVE_WIDTH LCD_WIDTH
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#endif
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#ifndef LCD_NATIVE_HEIGHT
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#define LCD_NATIVE_HEIGHT LCD_HEIGHT
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#endif
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#define LCD_FUDGE LCD_NATIVE_WIDTH%32
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#define LCD_BUFFER_SIZE ((LCD_NATIVE_WIDTH+LCD_FUDGE)*LCD_NATIVE_HEIGHT*2)
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#define LCD_TTB_AREA 0x100000*((LCD_BUFFER_SIZE>>19)+1)
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_TTB_AREA
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#elif CONFIG_CPU==S3C2440
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#include "cpu.h"
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/* must be 16Kb (0x4000) aligned */
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#define TTB_SIZE (0x4000)
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE
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#elif CONFIG_CPU==TCC7801
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#include "cpu.h"
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE
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#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
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#include "cpu.h"
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#define DRAMORIG DRAM_ORIG
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#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE)
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#else
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE)
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#endif
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#elif CONFIG_CPU==S5L8702
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#define ASM
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#include "cpu.h"
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - TTB_SIZE)
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#elif CONFIG_CPU==IMX233
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#include "cpu.h"
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#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - CODEC_SIZE - FRAME_SIZE - TTB_SIZE)
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#endif
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/* default to full RAM (minus codecs&plugins) unless specified otherwise */
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#ifndef DRAMSIZE
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#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE
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#endif
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/* MCF5249 have 96KB of IRAM */
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#if CONFIG_CPU == MCF5249
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#define DRAMORIG 0x31000000
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#define IRAMORIG 0x1000c000
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#define IRAMSIZE 0xc000
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/* MCF5250 have 128KB of IRAM */
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#elif CONFIG_CPU == MCF5250
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#define DRAMORIG 0x31000000
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#define IRAMORIG 0x1000c800
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#define IRAMSIZE 0x13800
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#elif CONFIG_CPU == PP5022 || CONFIG_CPU == PP5024
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/* PP5022/24 have 128KB of IRAM */
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#define DRAMORIG 0x00000000
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#define IRAMORIG 0x4000c000
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#define IRAMSIZE 0x14000
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#elif defined(CPU_PP)
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/* all other PP's have 96KB of IRAM */
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#define DRAMORIG 0x00000000
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#define IRAMORIG 0x4000c000
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#define IRAMSIZE 0x0c000
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#elif CONFIG_CPU == PNX0101
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#define DRAMORIG 0xc00000 + STUBOFFSET
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#define IRAMORIG 0x407000
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#define IRAMSIZE 0x9000
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#elif CONFIG_CPU == IMX31L || CONFIG_CPU == S3C2440
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#define DRAMORIG 0x0 + STUBOFFSET
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#define IRAM DRAM
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#define IRAMSIZE 0
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#elif CONFIG_CPU==DM320
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#define DRAMORIG CONFIG_SDRAM_START + STUBOFFSET
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#define IRAM DRAM
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/* The bit of IRAM that is available is used in the core */
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#define IRAMSIZE 0
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#elif defined(CPU_TCC780X) || defined(CPU_TCC77X)
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#define DRAMORIG 0x20000000
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#if CONFIG_CPU==TCC7801
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#define IRAMORIG 0x1000c000
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#define IRAMSIZE 0xc000
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#else
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#define IRAM DRAM
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#define IRAMSIZE 0
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#endif
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#elif CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2
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#if defined(AMS_LOWMEM) || (CONFIG_CPU == AS3525v2)
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#define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */
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#define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE)
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#define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE)
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#else
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#define IRAMORIG (IRAM_ORIG + 0x20000)
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#define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG)
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#endif
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#elif CONFIG_CPU==S5L8700
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/* S5L8700 have 256KB of IRAM */
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#define DRAMORIG 0x08000000
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#define IRAMORIG (0x00000000 + (48*1024))
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#define IRAMSIZE (208*1024)
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#elif CONFIG_CPU==S5L8701
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/* S5L8701 have 176KB of IRAM */
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#define DRAMORIG 0x08000000
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#define IRAMORIG (0x00000000 + (48*1024))
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#define IRAMSIZE (128*1024)
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#elif CONFIG_CPU==S5L8702
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/* S5L8702 have 256KB of IRAM */
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#define DRAMORIG 0x08000000
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#define IRAMORIG (0x00000000 + (56*1024))
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#define IRAMSIZE (200*1024)
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#elif CONFIG_CPU == JZ4732
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#define DRAMORIG 0x80004000 + STUBOFFSET
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#define IRAM DRAM
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#define IRAMSIZE 0
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/* The bit of IRAM that is available is used in the core */
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#elif CONFIG_CPU == RK27XX
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#define DRAMORIG 0x60000000
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#define IRAM DRAM
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#define IRAMSIZE 0
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#elif CONFIG_CPU == IMX233
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#include "cpu.h"
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/* The IRAM is too small and already partly used by the core */
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#define DRAMORIG CACHED_DRAM_ADDR
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#define IRAM DRAM
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#define IRAMSIZE 0
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#else
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#define DRAMORIG 0x09000000 + STUBOFFSET
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#endif
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#ifndef NOCACHE_BASE
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/* Default to no offset if target doesn't define this */
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#define NOCACHE_BASE 0x00000000
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#endif
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#define PLUGIN_LENGTH PLUGIN_BUFFER_SIZE
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#ifndef CODEC_ORIGIN /* targets can specify another origin */
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#define CODEC_ORIGIN (DRAMORIG + (DRAMSIZE))
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#endif
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#ifndef PLUGIN_ORIGIN /* targets can specify another origin */
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#define PLUGIN_ORIGIN (CODEC_ORIGIN + CODEC_SIZE)
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#endif
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#ifdef CODEC
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#define THIS_LENGTH CODEC_SIZE
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#define THIS_ORIGIN CODEC_ORIGIN
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#elif defined OVERLAY_OFFSET
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#define THIS_LENGTH (DRAMSIZE - OVERLAY_OFFSET)
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#define THIS_ORIGIN (DRAMORIG + OVERLAY_OFFSET)
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#elif defined IMGVDECODER_OFFSET
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#define THIS_LENGTH (PLUGIN_LENGTH - IMGVDECODER_OFFSET)
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#define THIS_ORIGIN (PLUGIN_ORIGIN + IMGVDECODER_OFFSET)
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#else /* plugin */
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#define THIS_LENGTH PLUGIN_LENGTH
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#define THIS_ORIGIN PLUGIN_ORIGIN
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#endif
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MEMORY
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{
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PLUGIN_RAM : ORIGIN = THIS_ORIGIN, LENGTH = THIS_LENGTH
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#if defined(IRAMSIZE) && IRAMSIZE != 0
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PLUGIN_IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
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#endif
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}
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SECTIONS
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{
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.header : {
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_plugin_start_addr = .;
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plugin_start_addr = .;
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KEEP(*(.header))
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} > PLUGIN_RAM
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.text :
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{
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*(.text*)
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#if defined(IRAMSIZE) && IRAMSIZE == 0
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*(.icode)
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#endif
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#ifdef CPU_ARM
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*(.glue_7)
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*(.glue_7t)
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#endif
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} > PLUGIN_RAM
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.rodata :
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{
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*(.rodata*)
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#if defined(IRAMSIZE) && IRAMSIZE == 0
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*(.irodata)
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#endif
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. = ALIGN(0x4);
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} > PLUGIN_RAM
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.data :
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{
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*(.data*)
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#if defined(IRAMSIZE) && IRAMSIZE == 0
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*(.idata)
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#endif
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} > PLUGIN_RAM
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#if NOCACHE_BASE != 0
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.ncdata . + NOCACHE_BASE :
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{
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. = ALIGN(CACHEALIGN_SIZE);
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*(.ncdata*)
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. = ALIGN(CACHEALIGN_SIZE);
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/* EABI currently needs iramcopy defined here, otherwise .iram can sometimes
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have an incorrect load address, breaking codecs. */
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#if defined(IRAMSIZE)
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iramcopy = . - NOCACHE_BASE;
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#endif
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} AT> PLUGIN_RAM
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/* This definition is used when NOCACHE_BASE is 0. The address offset bug only
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seems to occur when the empty .ncdata is present. */
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#elif defined(IRAMSIZE)
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iramcopy = .;
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#endif
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/DISCARD/ :
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{
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*(.eh_frame)
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#ifdef CPU_MIPS
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*(.rel.dyn)
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#endif
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}
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#if defined(IRAMSIZE) && IRAMSIZE != 0
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.iram IRAMORIG : AT ( iramcopy)
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{
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iramstart = .;
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*(.icode)
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*(.irodata)
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*(.idata)
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iramend = .;
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} > PLUGIN_IRAM
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.ibss (NOLOAD) :
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{
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iedata = .;
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*(.ibss)
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. = ALIGN(0x4);
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iend = .;
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} > PLUGIN_IRAM
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#endif
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.bss (NOLOAD) :
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{
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plugin_bss_start = .;
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_plugin_bss_start = .;
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*(.bss*)
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#if defined(IRAMSIZE) && IRAMSIZE == 0
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*(.ibss)
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#endif
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*(COMMON)
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. = ALIGN(0x4);
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} > PLUGIN_RAM
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#if NOCACHE_BASE != 0
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.ncbss . + NOCACHE_BASE (NOLOAD) :
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{
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. = ALIGN(CACHEALIGN_SIZE);
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*(.ncbss*)
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. = ALIGN(CACHEALIGN_SIZE);
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} AT> PLUGIN_RAM
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#endif
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/* Restore . */
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.pluginend . - NOCACHE_BASE :
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{
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_plugin_end_addr = .;
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plugin_end_addr = .;
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}
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/* Special trick to avoid a linker error when no other sections are
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left after garbage collection (plugin not for this platform) */
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.comment 0 :
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{
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KEEP(*(.comment))
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}
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}
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