8983fcb5f2
Bootloader builds, normal does not. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20574 a1c6a512-1295-4272-9138-f99709370657
78 lines
2.6 KiB
C
78 lines
2.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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*
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* Copyright (C) 2009 by Jorge Pinto
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "kernel.h"
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#include "timer.h"
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#include "thread.h"
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#include "at91sam9260.h"
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/*-----------------------------------------------------------------------------
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* Function Name : pitc_handler
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* Object : Handler for PITC interrupt
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*---------------------------------------------------------------------------*/
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void pitc_handler(void)
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{
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unsigned long pivr = 0;
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unsigned long pisr = 0;
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/* Read the PISR */
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pisr = AT91C_PITC_PISR & AT91C_PITC_PITS;
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/* Read the PIVR. It acknowledges the IT */
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pivr = AT91C_PITC_PIVR;
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/* Run through the list of tick tasks */
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call_tick_tasks();
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}
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void tick_start(unsigned int interval_in_ms)
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{
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volatile unsigned long pimr = 0;
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/* Configure a resolution of 1 ms */
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AT91C_PITC_PIMR = MCK_FREQ / (((16 * 1000) - 1) / interval_in_ms);
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/* Enable interrupts */
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/* Disable the interrupt on the interrupt controller */
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AT91C_AIC_IDCR = (1 << AT91C_ID_SYS);
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/* Save the interrupt handler routine pointer and the interrupt priority */
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AT91C_AIC_SVR(AT91C_ID_SYS) = (unsigned long) pitc_handler;
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/* Store the Source Mode Register */
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AT91C_AIC_SMR(AT91C_ID_SYS) = AT91C_AIC_SRCTYPE_INT_LEVEL_SENSITIVE | \
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AT91C_AIC_PRIOR_LOWEST;
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/* Clear the interrupt on the interrupt controller */
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AT91C_AIC_ICCR = (1 << AT91C_ID_SYS);
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/* Enable the interrupt on the interrupt controller */
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AT91C_AIC_IECR = (1 << AT91C_ID_SYS);
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/* Enable the interrupt on the pit */
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pimr = AT91C_PITC_PIMR;
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AT91C_PITC_PIMR = pimr | AT91C_PITC_PITIEN;
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/* Enable the pit */
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pimr = AT91C_PITC_PIMR;
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AT91C_PITC_PIMR = pimr | AT91C_PITC_PITEN;
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}
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