c46b44f20b
Demo plugins run fine, mpegplayer data aborts for yet unknown reasons git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22876 a1c6a512-1295-4272-9138-f99709370657
168 lines
3.8 KiB
ArmAsm
168 lines
3.8 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Jens Arnold
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* Modified from ipod/lcd-as-gray.S for YH920 by Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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.text
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.align 2
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.global lcd_write_data
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.type lcd_write_data,%function
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lcd_write_data:
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ldr r12, =LCD1_BASE
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.loop:
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ldrb r2, [r0], #1
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1:
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ldr r3, [r12]
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tst r3, #LCD1_BUSY_MASK
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bne 1b
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str r2, [r12, #0x10]
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ldrb r2, [r0], #1
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1:
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ldr r3, [r12]
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tst r3, #LCD1_BUSY_MASK
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bne 1b
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str r2, [r12, #0x10]
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subs r1, r1, #1
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bne .loop
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bx lr
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.size lcd_write_data,.-lcd_write_data
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.global lcd_mono_data
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.type lcd_mono_data,%function
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lcd_mono_data:
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stmfd sp!, {r4, lr}
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ldr lr, =LCD1_BASE
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ldr r12, =lcd_dibits
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.mloop:
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ldrb r2, [r0], #1
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mov r3, r2, lsr #4
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ldrb r4, [r12, r3]
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1:
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ldr r3, [lr]
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tst r3, #LCD1_BUSY_MASK
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bne 1b
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str r4, [lr, #0x10]
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and r3, r2, #0x0f
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ldrb r4, [r12, r3]
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1:
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ldr r3, [lr]
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tst r3, #LCD1_BUSY_MASK
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bne 1b
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str r4, [lr, #0x10]
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subs r1, r1, #1
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bne .mloop
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ldmfd sp!, {r4, pc}
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.size lcd_mono_data,.-lcd_mono_data
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.global lcd_grey_data
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.type lcd_grey_data,%function
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/* A high performance function to write grey phase data to the display,
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* one or multiple pixels.
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*
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* Arguments:
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* r0 - pixel value data address
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* r1 - pixel phase data address
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* r2 - pixel block count
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*
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* Register usage:
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* r3/r4 - current block of phases
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* r5/r6 - current block of values
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* r7 - lcd data accumulator
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* r8 - phase signs mask
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* lr - lcd bridge address
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*/
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lcd_grey_data:
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stmfd sp!, {r4-r7, lr}
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mov r12, #0x80
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orr r12, r12, r12, lsl #8
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orr r12, r12, r12, lsl #16
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ldr lr, =LCD1_BASE
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.greyloop:
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ldmia r1, {r3-r4} /* Fetch 8 pixel phases */
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ldmia r0!, {r5-r6} /* Fetch 8 pixel values */
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mov r7, #0
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tst r3, #0x80
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orreq r7, r7, #0xc0
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tst r3, #0x8000
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orreq r7, r7, #0x30
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tst r3, #0x800000
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orreq r7, r7, #0x0c
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tst r3, #0x80000000
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orreq r7, r7, #0x03
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bic r3, r3, r12
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add r3, r3, r5
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1:
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ldr r5, [lr]
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tst r5, #LCD1_BUSY_MASK
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bne 1b
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str r7, [lr, #0x10]
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mov r7, #0
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tst r4, #0x80
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orreq r7, r7, #0xc0
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tst r4, #0x8000
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orreq r7, r7, #0x30
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tst r4, #0x800000
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orreq r7, r7, #0x0c
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tst r4, #0x80000000
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orreq r7, r7, #0x03
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bic r4, r4, r12
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add r4, r4, r6
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stmia r1!, {r3-r4}
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1:
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ldr r5, [lr]
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tst r5, #LCD1_BUSY_MASK
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bne 1b
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str r7, [lr, #0x10]
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subs r2, r2, #1
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bne .greyloop
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ldmfd sp!, {r4-r7, pc}
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.size lcd_grey_data,.-lcd_grey_data
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