1) Avoid load/store delay slot by reorganizing instructions
in copy loops
2) Fix off-by-one error in cache initialization code.
This was harmless as it simply set line0 twice, now it sets
every cacheline only once.
3) Fix off-by-word error in .bss clearing loop.
The addiu in branch delay slot even if calculated is not seen
by the branch instruction itself, so the code did one word
too much in clearing.
4) Fix off-by-word error in deadbeefing stack.
See above.
Change-Id: Iabb09a55979de7aa2e2b9234273683fc7e9762c5
5900bf7315