017667c2dc
Change-Id: Ia87086f4f4f4ecbb844ffd869407b14ea2509934
154 lines
7.4 KiB
C
154 lines
7.4 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* This file was automatically generated by headergen, DO NOT EDIT it.
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* headergen version: 2.1.7
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* XML versions: stmp3700:3.2.0
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*
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* Copyright (C) 2013 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __HEADERGEN__STMP3700__SAIF__H__
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#define __HEADERGEN__STMP3700__SAIF__H__
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#define REGS_SAIF_BASE(i) ((i) == 1 ? 0x80042000 : 0x80046000)
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#define REGS_SAIF_VERSION "3.2.0"
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/**
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* Register: HW_SAIF_CTRL
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* Address: 0
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* SCT: yes
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*/
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#define HW_SAIF_CTRL(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x0 + 0x0))
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#define HW_SAIF_CTRL_SET(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x0 + 0x4))
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#define HW_SAIF_CTRL_CLR(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x0 + 0x8))
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#define HW_SAIF_CTRL_TOG(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x0 + 0xc))
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#define BP_SAIF_CTRL_SFTRST 31
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#define BM_SAIF_CTRL_SFTRST 0x80000000
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#define BF_SAIF_CTRL_SFTRST(v) (((v) << 31) & 0x80000000)
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#define BP_SAIF_CTRL_CLKGATE 30
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#define BM_SAIF_CTRL_CLKGATE 0x40000000
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#define BF_SAIF_CTRL_CLKGATE(v) (((v) << 30) & 0x40000000)
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#define BP_SAIF_CTRL_BITCLK_MULT_RATE 27
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#define BM_SAIF_CTRL_BITCLK_MULT_RATE 0x38000000
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#define BF_SAIF_CTRL_BITCLK_MULT_RATE(v) (((v) << 27) & 0x38000000)
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#define BP_SAIF_CTRL_BITCLK_BASE_RATE 26
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#define BM_SAIF_CTRL_BITCLK_BASE_RATE 0x4000000
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#define BF_SAIF_CTRL_BITCLK_BASE_RATE(v) (((v) << 26) & 0x4000000)
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#define BP_SAIF_CTRL_FIFO_ERROR_IRQ_EN 25
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#define BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN 0x2000000
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#define BF_SAIF_CTRL_FIFO_ERROR_IRQ_EN(v) (((v) << 25) & 0x2000000)
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#define BP_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 24
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#define BM_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 0x1000000
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#define BF_SAIF_CTRL_FIFO_SERVICE_IRQ_EN(v) (((v) << 24) & 0x1000000)
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#define BP_SAIF_CTRL_DMAWAIT_COUNT 16
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#define BM_SAIF_CTRL_DMAWAIT_COUNT 0x1f0000
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#define BF_SAIF_CTRL_DMAWAIT_COUNT(v) (((v) << 16) & 0x1f0000)
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#define BP_SAIF_CTRL_CHANNEL_NUM_SELECT 14
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#define BM_SAIF_CTRL_CHANNEL_NUM_SELECT 0xc000
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#define BF_SAIF_CTRL_CHANNEL_NUM_SELECT(v) (((v) << 14) & 0xc000)
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#define BP_SAIF_CTRL_BIT_ORDER 12
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#define BM_SAIF_CTRL_BIT_ORDER 0x1000
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#define BF_SAIF_CTRL_BIT_ORDER(v) (((v) << 12) & 0x1000)
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#define BP_SAIF_CTRL_DELAY 11
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#define BM_SAIF_CTRL_DELAY 0x800
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#define BF_SAIF_CTRL_DELAY(v) (((v) << 11) & 0x800)
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#define BP_SAIF_CTRL_JUSTIFY 10
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#define BM_SAIF_CTRL_JUSTIFY 0x400
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#define BF_SAIF_CTRL_JUSTIFY(v) (((v) << 10) & 0x400)
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#define BP_SAIF_CTRL_LRCLK_POLARITY 9
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#define BM_SAIF_CTRL_LRCLK_POLARITY 0x200
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#define BF_SAIF_CTRL_LRCLK_POLARITY(v) (((v) << 9) & 0x200)
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#define BP_SAIF_CTRL_BITCLK_EDGE 8
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#define BM_SAIF_CTRL_BITCLK_EDGE 0x100
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#define BF_SAIF_CTRL_BITCLK_EDGE(v) (((v) << 8) & 0x100)
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#define BP_SAIF_CTRL_WORD_LENGTH 4
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#define BM_SAIF_CTRL_WORD_LENGTH 0xf0
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#define BF_SAIF_CTRL_WORD_LENGTH(v) (((v) << 4) & 0xf0)
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#define BP_SAIF_CTRL_BITCLK_48XFS_ENABLE 3
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#define BM_SAIF_CTRL_BITCLK_48XFS_ENABLE 0x8
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#define BF_SAIF_CTRL_BITCLK_48XFS_ENABLE(v) (((v) << 3) & 0x8)
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#define BP_SAIF_CTRL_SLAVE_MODE 2
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#define BM_SAIF_CTRL_SLAVE_MODE 0x4
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#define BF_SAIF_CTRL_SLAVE_MODE(v) (((v) << 2) & 0x4)
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#define BP_SAIF_CTRL_READ_MODE 1
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#define BM_SAIF_CTRL_READ_MODE 0x2
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#define BF_SAIF_CTRL_READ_MODE(v) (((v) << 1) & 0x2)
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#define BP_SAIF_CTRL_RUN 0
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#define BM_SAIF_CTRL_RUN 0x1
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#define BF_SAIF_CTRL_RUN(v) (((v) << 0) & 0x1)
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/**
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* Register: HW_SAIF_STAT
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* Address: 0x10
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* SCT: yes
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*/
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#define HW_SAIF_STAT(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x10 + 0x0))
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#define HW_SAIF_STAT_SET(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x10 + 0x4))
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#define HW_SAIF_STAT_CLR(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x10 + 0x8))
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#define HW_SAIF_STAT_TOG(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x10 + 0xc))
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#define BP_SAIF_STAT_PRESENT 31
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#define BM_SAIF_STAT_PRESENT 0x80000000
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#define BF_SAIF_STAT_PRESENT(v) (((v) << 31) & 0x80000000)
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#define BP_SAIF_STAT_DMA_PREQ 16
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#define BM_SAIF_STAT_DMA_PREQ 0x10000
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#define BF_SAIF_STAT_DMA_PREQ(v) (((v) << 16) & 0x10000)
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#define BP_SAIF_STAT_FIFO_UNDERFLOW_IRQ 6
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#define BM_SAIF_STAT_FIFO_UNDERFLOW_IRQ 0x40
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#define BF_SAIF_STAT_FIFO_UNDERFLOW_IRQ(v) (((v) << 6) & 0x40)
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#define BP_SAIF_STAT_FIFO_OVERFLOW_IRQ 5
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#define BM_SAIF_STAT_FIFO_OVERFLOW_IRQ 0x20
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#define BF_SAIF_STAT_FIFO_OVERFLOW_IRQ(v) (((v) << 5) & 0x20)
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#define BP_SAIF_STAT_FIFO_SERVICE_IRQ 4
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#define BM_SAIF_STAT_FIFO_SERVICE_IRQ 0x10
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#define BF_SAIF_STAT_FIFO_SERVICE_IRQ(v) (((v) << 4) & 0x10)
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#define BP_SAIF_STAT_BUSY 0
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#define BM_SAIF_STAT_BUSY 0x1
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#define BF_SAIF_STAT_BUSY(v) (((v) << 0) & 0x1)
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/**
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* Register: HW_SAIF_DATA
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* Address: 0x20
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* SCT: yes
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*/
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#define HW_SAIF_DATA(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x20 + 0x0))
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#define HW_SAIF_DATA_SET(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x20 + 0x4))
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#define HW_SAIF_DATA_CLR(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x20 + 0x8))
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#define HW_SAIF_DATA_TOG(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x20 + 0xc))
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#define BP_SAIF_DATA_PCM_RIGHT 16
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#define BM_SAIF_DATA_PCM_RIGHT 0xffff0000
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#define BF_SAIF_DATA_PCM_RIGHT(v) (((v) << 16) & 0xffff0000)
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#define BP_SAIF_DATA_PCM_LEFT 0
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#define BM_SAIF_DATA_PCM_LEFT 0xffff
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#define BF_SAIF_DATA_PCM_LEFT(v) (((v) << 0) & 0xffff)
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/**
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* Register: HW_SAIF_VERSION
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* Address: 0x30
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* SCT: no
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*/
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#define HW_SAIF_VERSION(d) (*(volatile unsigned long *)(REGS_SAIF_BASE(d) + 0x30))
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#define BP_SAIF_VERSION_MAJOR 24
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#define BM_SAIF_VERSION_MAJOR 0xff000000
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#define BF_SAIF_VERSION_MAJOR(v) (((v) << 24) & 0xff000000)
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#define BP_SAIF_VERSION_MINOR 16
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#define BM_SAIF_VERSION_MINOR 0xff0000
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#define BF_SAIF_VERSION_MINOR(v) (((v) << 16) & 0xff0000)
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#define BP_SAIF_VERSION_STEP 0
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#define BM_SAIF_VERSION_STEP 0xffff
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#define BF_SAIF_VERSION_STEP(v) (((v) << 0) & 0xffff)
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#endif /* __HEADERGEN__STMP3700__SAIF__H__ */
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