9e4299f6f0
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30988 a1c6a512-1295-4272-9138-f99709370657
77 lines
3.1 KiB
C
77 lines
3.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __POWER_IMX233__
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#define __POWER_IMX233__
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#include "system.h"
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#include "system-target.h"
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#include "cpu.h"
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#define HW_POWER_BASE 0x80044000
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#define HW_POWER_CTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x0))
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#define HW_POWER_CTRL__ENIRQ_VBUS_VALID (1 << 3)
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#define HW_POWER_CTRL__VBUSVALID_IRQ (1 << 4)
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#define HW_POWER_CTRL__POLARITY_VBUSVALID (1 << 5)
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#define HW_POWER_5VCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x10))
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#define HW_POWER_5VCTRL__VBUSVALID_5VDETECT (1 << 4)
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#define HW_POWER_5VCTRL__VBUSVALID_TRSH_BP 8
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#define HW_POWER_5VCTRL__VBUSVALID_TRSH_BM (0x7 << 8)
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#define HW_POWER_MINPWR (*(volatile uint32_t *)(HW_POWER_BASE + 0x20))
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#define HW_POWER_CHARGE (*(volatile uint32_t *)(HW_POWER_BASE + 0x30))
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#define HW_POWER_CHARGE__BATTCHRG_I_BP 0
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#define HW_POWER_CHARGE__BATTCHRG_I_BM 0x3f
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#define HW_POWER_CHARGE__STOP_ILIMIT_BP 8
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#define HW_POWER_CHARGE__STOP_ILIMIT_BM 0xf00
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#define HW_POWER_CHARGE__PWD_BATTCHRG (1 << 16)
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#define HW_POWER_CHARGE__CHRG_STS_OFF (1 << 19)
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#define HW_POWER_VDDDCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x40))
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#define HW_POWER_VDDDCTRL__TRG_BP 0
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#define HW_POWER_VDDDCTRL__TRG_BM 0x1f
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#define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */
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#define HW_POWER_VDDACTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x50))
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#define HW_POWER_VDDIOCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x60))
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#define HW_POWER_VDDMEMCTRL (*(volatile uint32_t *)(HW_POWER_BASE + 0x70))
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#define HW_POWER_MISC (*(volatile uint32_t *)(HW_POWER_BASE + 0x90))
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#define HW_POWER_STS (*(volatile uint32_t *)(HW_POWER_BASE + 0xc0))
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#define HW_POWER_STS__VBUSVALID (1 << 1)
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#define HW_POWER_STS__PSWITCH_BP 20
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#define HW_POWER_STS__PSWITCH_BM (3 << 20)
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#define HW_POWER_BATTMONITOR (*(volatile uint32_t *)(HW_POWER_BASE + 0xe0))
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#define HW_POWER_BATTMONITOR__BATT_VAL_BP 16
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#define HW_POWER_BATTMONITOR__BATT_VAL_BM (0x3ff << 16)
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#define HW_POWER_RESET (*(volatile uint32_t *)(HW_POWER_BASE + 0x100))
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#define HW_POWER_RESET__UNLOCK 0x3E770000
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#define HW_POWER_RESET__PWD 0x1
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#endif /* __POWER_IMX233__ */
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