c9133db4b1
Even if we disable it in VIC_INT_EN_CLEAR, it still fires an interrupt by running the default isr. Locking requires disabling interrupts completely. I'm not sure if DMAC is the only interrupt affected or if we can't rely on VIC_INT_EN_CLEAR to mask interrupts. If it's the latter, we will need to have special locking scheme for INT_AUDIO. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26316 a1c6a512-1295-4272-9138-f99709370657
358 lines
9.7 KiB
C
358 lines
9.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright © 2008-2009 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "audio.h"
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#include "string.h"
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#include "as3525.h"
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#include "pl081.h"
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#include "dma-target.h"
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#include "clock-target.h"
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#include "panic.h"
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#include "as3514.h"
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#include "audiohw.h"
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#include "mmu-arm.h"
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#define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
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* i.e. 32 bits at once (size of I2SO_DATA)
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* and the number of 32bits words has to
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* fit in 11 bits of DMA register */
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static unsigned char *dma_start_addr;
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static size_t dma_size; /* in 4*32 bits */
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static void dma_callback(void);
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static int locked = 0;
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static int play_irq_state;
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/* Mask the DMA interrupt */
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void pcm_play_lock(void)
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{
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if(++locked == 1)
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play_irq_state = disable_irq_save();
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}
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/* Unmask the DMA interrupt if enabled */
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void pcm_play_unlock(void)
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{
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if(--locked == 0)
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restore_irq(play_irq_state);
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}
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static void play_start_pcm(void)
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{
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const unsigned char* addr = dma_start_addr;
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size_t size = dma_size;
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if(size > MAX_TRANSFER)
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size = MAX_TRANSFER;
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dma_size -= size;
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dma_start_addr += size;
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clean_dcache_range((void*)addr, size); /* force write back */
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dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
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DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
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dma_callback);
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}
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static void dma_callback(void)
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{
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if(!dma_size)
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{
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pcm_play_get_more_callback((void **)&dma_start_addr, &dma_size);
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if (!dma_size)
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return;
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}
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play_start_pcm();
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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dma_size = size;
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dma_start_addr = (unsigned char*)addr;
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CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
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CGU_AUDIO |= (1<<11);
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dma_retain();
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play_start_pcm();
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}
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void pcm_play_dma_stop(void)
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{
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dma_disable_channel(1);
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dma_size = 0;
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dma_release();
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CGU_PERI &= ~CGU_I2SOUT_APB_CLOCK_ENABLE;
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CGU_AUDIO &= ~(1<<11);
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}
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void pcm_play_dma_pause(bool pause)
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{
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if(pause)
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dma_disable_channel(1);
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else
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play_start_pcm();
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}
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void pcm_play_dma_init(void)
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{
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CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
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I2SOUT_CONTROL = (1<<6)|(1<<3) /* enable dma, stereo */;
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audiohw_preinit();
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}
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void pcm_postinit(void)
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{
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audiohw_postinit();
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}
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/* divider is 9 bits but the highest one (for 8kHz) fit in 8 bits */
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static const unsigned char divider[SAMPR_NUM_FREQ] = {
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[HW_FREQ_96] = ((AS3525_MCLK_FREQ/128 + SAMPR_96/2) / SAMPR_96) - 1,
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[HW_FREQ_88] = ((AS3525_MCLK_FREQ/128 + SAMPR_88/2) / SAMPR_88) - 1,
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[HW_FREQ_64] = ((AS3525_MCLK_FREQ/128 + SAMPR_64/2) / SAMPR_64) - 1,
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[HW_FREQ_48] = ((AS3525_MCLK_FREQ/128 + SAMPR_48/2) / SAMPR_48) - 1,
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[HW_FREQ_44] = ((AS3525_MCLK_FREQ/128 + SAMPR_44/2) / SAMPR_44) - 1,
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[HW_FREQ_32] = ((AS3525_MCLK_FREQ/128 + SAMPR_32/2) / SAMPR_32) - 1,
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[HW_FREQ_24] = ((AS3525_MCLK_FREQ/128 + SAMPR_24/2) / SAMPR_24) - 1,
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[HW_FREQ_22] = ((AS3525_MCLK_FREQ/128 + SAMPR_22/2) / SAMPR_22) - 1,
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[HW_FREQ_16] = ((AS3525_MCLK_FREQ/128 + SAMPR_16/2) / SAMPR_16) - 1,
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[HW_FREQ_12] = ((AS3525_MCLK_FREQ/128 + SAMPR_12/2) / SAMPR_12) - 1,
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[HW_FREQ_11] = ((AS3525_MCLK_FREQ/128 + SAMPR_11/2) / SAMPR_11) - 1,
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[HW_FREQ_8 ] = ((AS3525_MCLK_FREQ/128 + SAMPR_8 /2) / SAMPR_8 ) - 1,
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};
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static inline unsigned char mclk_divider(void)
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{
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return divider[pcm_fsel];
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}
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void pcm_dma_apply_settings(void)
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{
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int cgu_audio = CGU_AUDIO; /* read register */
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cgu_audio &= ~(3 << 0); /* clear i2sout MCLK_SEL */
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cgu_audio |= (AS3525_MCLK_SEL << 0); /* set i2sout MCLK_SEL */
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cgu_audio &= ~(0x1ff << 2); /* clear i2sout divider */
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cgu_audio |= mclk_divider() << 2; /* set new i2sout divider */
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CGU_AUDIO = cgu_audio; /* write back register */
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}
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size_t pcm_get_bytes_waiting(void)
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{
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return dma_size;
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}
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const void * pcm_play_dma_get_peak_buffer(int *count)
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{
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pcm_play_lock();
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unsigned char *addr = (void*)DMAC_CH_SRC_ADDR(1);
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*count = (dma_size - (addr - dma_start_addr)) >> 2;
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pcm_play_unlock();
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return AS3525_UNCACHED_ADDR(addr);
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}
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#ifdef HAVE_PCM_DMA_ADDRESS
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void * pcm_dma_addr(void *addr)
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{
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if (addr != NULL)
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addr = AS3525_UNCACHED_ADDR(addr);
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return addr;
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}
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#endif
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/****************************************************************************
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** Recording DMA transfer
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**/
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#ifdef HAVE_RECORDING
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static int rec_locked = 0;
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static unsigned char *rec_dma_start_addr;
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static size_t rec_dma_size, rec_dma_transfer_size;
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static void rec_dma_callback(void);
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#if CONFIG_CPU == AS3525
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/* points to the samples which need to be duplicated into the right channel */
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static int16_t *mono_samples;
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#endif
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static int rec_irq_state;
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void pcm_rec_lock(void)
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{
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if(++rec_locked == 1)
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rec_irq_state = disable_irq_save();
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}
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void pcm_rec_unlock(void)
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{
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if(--rec_locked == 0)
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restore_irq(rec_irq_state);
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}
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static void rec_dma_start(void)
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{
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rec_dma_transfer_size = rec_dma_size;
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/* We are limited to 8188 DMA transfers, and the recording core asks for
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* 8192 bytes. Avoid splitting 8192 bytes transfers in 8188 + 4 */
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if(rec_dma_transfer_size > 4096)
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rec_dma_transfer_size = 4096;
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dma_enable_channel(1, (void*)I2SIN_DATA, rec_dma_start_addr, DMA_PERI_I2SIN,
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DMAC_FLOWCTRL_DMAC_PERI_TO_MEM, false, true,
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rec_dma_transfer_size >> 2, DMA_S4, rec_dma_callback);
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}
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/* if needed, duplicate samples of the working channel until the given bound */
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static inline void mono2stereo(int16_t *end)
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{
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#if CONFIG_CPU == AS3525
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if(audio_channels != 1) /* only for microphone */
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return;
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#if 0
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/* load pointer in a register and avoid updating it in each loop */
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register int16_t *samples = mono_samples;
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do {
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int16_t left = *samples++; // load 1 sample of the left-channel
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*samples++ = left; // copy it in the right-channel
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} while(samples != end);
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mono_samples = samples; /* update pointer */
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#else
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/* gcc doesn't use pre indexing : let's save 1 cycle */
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int16_t left;
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asm (
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"1: ldrh %0, [%1], #2 \n" // load 1 sample of the left-channel
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" strh %0, [%1], #2 \n" // copy it in the right-channel
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" cmp %1, %2 \n" // are we finished?
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" bne 1b \n"
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: "=r"(left), "+r"(mono_samples)
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: "r"(end)
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: "memory"
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);
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#endif /* C / ASM */
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#else
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/* microphone recording is stereo on as3525v2 */
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(void)end;
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#endif
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}
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static void rec_dma_callback(void)
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{
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rec_dma_size -= rec_dma_transfer_size;
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rec_dma_start_addr += rec_dma_transfer_size;
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/* the 2nd channel is silent when recording microphone on as3525v1 */
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mono2stereo(AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr));
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if(!rec_dma_size)
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{
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pcm_rec_more_ready_callback(0, (void **)&rec_dma_start_addr,
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&rec_dma_size);
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if(rec_dma_size == 0)
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return;
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dump_dcache_range(rec_dma_start_addr, rec_dma_size);
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#if CONFIG_CPU == AS3525
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mono_samples = AS3525_UNCACHED_ADDR((int16_t*)rec_dma_start_addr);
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#endif
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}
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rec_dma_start();
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}
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void pcm_rec_dma_stop(void)
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{
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dma_disable_channel(1);
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dma_release();
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rec_dma_size = 0;
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I2SIN_CONTROL &= ~(1<<11); /* disable dma */
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CGU_AUDIO &= ~((1<<23)|(1<<11));
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CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
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}
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void pcm_rec_dma_start(void *addr, size_t size)
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{
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dump_dcache_range(addr, size);
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rec_dma_start_addr = addr;
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#if CONFIG_CPU == AS3525
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mono_samples = AS3525_UNCACHED_ADDR(addr);
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#endif
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rec_dma_size = size;
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dma_retain();
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CGU_PERI |= CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE;
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CGU_AUDIO |= ((1<<23)|(1<<11));
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I2SIN_CONTROL |= (1<<11)|(1<<5); /* enable dma, 14bits samples */
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rec_dma_start();
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}
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void pcm_rec_dma_close(void)
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{
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}
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void pcm_rec_dma_init(void)
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{
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int cgu_audio = CGU_AUDIO; /* read register */
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cgu_audio &= ~(3 << 12); /* clear i2sin MCLK_SEL */
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cgu_audio |= (AS3525_MCLK_SEL << 12); /* set i2sin MCLK_SEL */
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cgu_audio &= ~(0x1ff << 14); /* clear i2sin divider */
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cgu_audio |= mclk_divider() << 14; /* set new i2sin divider */
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CGU_AUDIO = cgu_audio; /* write back register */
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/* i2c clk src = I2SOUTIF, sdata src = AFE,
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* data valid at positive edge of SCLK */
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I2SIN_CONTROL = (1<<2);
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I2SIN_MASK = 0; /* disables all interrupts */
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}
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const void * pcm_rec_dma_get_peak_buffer(void)
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{
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pcm_rec_lock();
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int16_t *addr = AS3525_UNCACHED_ADDR((int16_t *)DMAC_CH_DST_ADDR(1));
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mono2stereo(addr);
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pcm_rec_unlock();
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return addr;
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}
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#endif /* HAVE_RECORDING */
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