e367b05fca
driver for H10. Thanks to Laurent Baum for all his help with this code. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10701 a1c6a512-1295-4272-9138-f99709370657
376 lines
9.1 KiB
C
376 lines
9.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "string.h"
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#include "adc.h"
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#include "pcf50605.h"
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#include "pcf50606.h"
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#if CONFIG_CPU == SH7034
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/**************************************************************************
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** The A/D conversion is done every tick, in three steps:
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**
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** 1) On the tick interrupt, the conversion of channels 0-3 is started, and
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** the A/D interrupt is enabled.
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**
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** 2) After the conversion is done (approx. 256*4 cycles later), an interrupt
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** is generated at level 1, which is the same level as the tick interrupt
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** itself. This interrupt will be pending until the tick interrupt is
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** finished.
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** When the A/D interrupt is finally served, it will read the results
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** from the first conversion and start the conversion of channels 4-7.
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**
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** 3) When the conversion of channels 4-7 is finished, the interrupt is
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** triggered again, and the results are read. This time, no new
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** conversion is started, it will be done in the next tick interrupt.
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**
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** Thus, each channel will be updated HZ times per second.
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**
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*************************************************************************/
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static int current_channel;
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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static void adc_tick(void)
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{
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/* Start a conversion of channel group 0. This will trigger an interrupt,
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and the interrupt handler will take care of group 1. */
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current_channel = 0;
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 3;
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}
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void ADITI(void) __attribute__((interrupt_handler));
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void ADITI(void)
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{
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if(ADCSR & ADCSR_ADF)
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{
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ADCSR = 0;
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if(current_channel == 0)
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{
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adcdata[0] = ADDRA >> 6;
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adcdata[1] = ADDRB >> 6;
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adcdata[2] = ADDRC >> 6;
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adcdata[3] = ADDRD >> 6;
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current_channel = 4;
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/* Convert the next group */
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ADCSR = ADCSR_ADST | ADCSR_ADIE | ADCSR_SCAN | 7;
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}
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else
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{
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adcdata[4] = ADDRA >> 6;
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adcdata[5] = ADDRB >> 6;
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adcdata[6] = ADDRC >> 6;
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adcdata[7] = ADDRD >> 6;
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}
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}
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}
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unsigned short adc_read(int channel)
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{
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return adcdata[channel];
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}
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void adc_init(void)
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{
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ADCR = 0x7f; /* No external trigger; other bits should be 1 according
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to the manual... */
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ADCSR = 0;
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current_channel = 0;
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/* Enable the A/D IRQ on level 1 */
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IPRE = (IPRE & 0xf0ff) | 0x0100;
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tick_add_task(adc_tick);
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sleep(2); /* Ensure valid readings when adc_init returns */
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}
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#elif CONFIG_CPU == MCF5249
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static unsigned char adcdata[NUM_ADC_CHANNELS];
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#ifdef IRIVER_H300_SERIES
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static int channelnum[] =
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{
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5, /* ADC_BUTTONS (ADCIN2) */
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6, /* ADC_REMOTE (ADCIN3) */
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0, /* ADC_BATTERY (BATVOLT, resistive divider) */
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2, /* ADC_REMOTEDETECT (ADCIN1, resistive divider) */
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};
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unsigned short adc_scan(int channel)
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{
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unsigned char data;
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pcf50606_write(0x2f, 0x80 | (channelnum[channel] << 1) | 1);
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data = pcf50606_read(0x30);
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adcdata[channel] = data;
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return data;
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}
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#else
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#define CS_LO and_l(~0x80, &GPIO_OUT)
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#define CS_HI or_l(0x80, &GPIO_OUT)
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#define CLK_LO and_l(~0x00400000, &GPIO_OUT)
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#define CLK_HI or_l(0x00400000, &GPIO_OUT)
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#define DO (GPIO_READ & 0x80000000)
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#define DI_LO and_l(~0x00200000, &GPIO_OUT)
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#define DI_HI or_l(0x00200000, &GPIO_OUT)
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/* delay loop */
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#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)
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unsigned short adc_scan(int channel)
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{
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unsigned char data = 0;
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int i;
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CS_LO;
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DI_HI; /* Start bit */
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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DI_HI; /* Single channel */
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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if(channel & 1) /* LSB of channel number */
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DI_HI;
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else
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DI_LO;
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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if(channel & 2) /* MSB of channel number */
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DI_HI;
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else
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DI_LO;
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DELAY;
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CLK_HI;
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DELAY;
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CLK_LO;
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DELAY;
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for(i = 0;i < 8;i++) /* 8 bits of data */
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{
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CLK_HI;
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DELAY;
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CLK_LO;
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DELAY;
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data <<= 1;
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data |= DO?1:0;
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}
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CS_HI;
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adcdata[channel] = data;
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return data;
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}
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#endif
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unsigned short adc_read(int channel)
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{
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return adcdata[channel];
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}
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static int adc_counter;
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static void adc_tick(void)
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{
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if(++adc_counter == HZ)
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{
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adc_counter = 0;
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adc_scan(ADC_BATTERY);
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adc_scan(ADC_REMOTEDETECT); /* Temporary. Remove when the remote
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detection feels stable. */
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}
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}
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void adc_init(void)
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{
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#ifndef IRIVER_H300_SERIES
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or_l(0x80600080, &GPIO_FUNCTION); /* GPIO7: CS
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GPIO21: Data In (to the ADC)
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GPIO22: CLK
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GPIO31: Data Out (from the ADC) */
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or_l(0x00600080, &GPIO_ENABLE);
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or_l(0x80, &GPIO_OUT); /* CS high */
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and_l(~0x00400000, &GPIO_OUT); /* CLK low */
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#endif
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adc_scan(ADC_BATTERY);
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tick_add_task(adc_tick);
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}
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#elif CONFIG_CPU == TCC730
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/**************************************************************************
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**
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** Each channel will be updated HZ/CHANNEL_ORDER_SIZE times per second.
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**
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*************************************************************************/
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static int current_channel;
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static int current_channel_idx;
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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#define CHANNEL_ORDER_SIZE 2
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static int channel_order[CHANNEL_ORDER_SIZE] = {6,7};
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static void adc_tick(void)
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{
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if (ADCON & (1 << 3)) {
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/* previous conversion finished? */
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adcdata[current_channel] = ADDATA >> 6;
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if (++current_channel_idx >= CHANNEL_ORDER_SIZE)
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current_channel_idx = 0;
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current_channel = channel_order[current_channel_idx];
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int adcon = (current_channel << 4) | 1;
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ADCON = adcon;
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}
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}
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unsigned short adc_read(int channel)
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{
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return adcdata[channel];
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}
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void adc_init(void)
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{
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current_channel_idx = 0;
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current_channel = channel_order[current_channel_idx];
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ADCON = (current_channel << 4) | 1;
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tick_add_task(adc_tick);
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sleep(2); /* Ensure valid readings when adc_init returns */
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}
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#elif defined(IPOD_ARCH)
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struct adc_struct {
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long timeout;
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void (*conversion)(unsigned short *data);
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short channelnum;
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unsigned short data;
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};
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static struct adc_struct adcdata[NUM_ADC_CHANNELS] IDATA_ATTR;
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static unsigned short _adc_read(struct adc_struct *adc)
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{
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if (adc->timeout < current_tick) {
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unsigned char data[2];
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unsigned short value;
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/* 5x per 2 seconds */
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adc->timeout = current_tick + (HZ * 2 / 5);
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/* ADCC1, 10 bit, start */
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pcf50605_write(0x2f, (adc->channelnum << 1) | 0x1);
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pcf50605_read_multiple(0x30, data, 2); /* ADCS1, ADCS2 */
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value = data[0];
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value <<= 2;
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value |= data[1] & 0x3;
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if (adc->conversion) {
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adc->conversion(&value);
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}
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adc->data = value;
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return value;
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} else {
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return adc->data;
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}
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}
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/* Force an ADC scan _now_ */
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unsigned short adc_scan(int channel) {
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struct adc_struct *adc = &adcdata[channel];
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adc->timeout = 0;
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return _adc_read(adc);
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}
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/* Retrieve the ADC value, only does a scan periodically */
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unsigned short adc_read(int channel) {
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return _adc_read(&adcdata[channel]);
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}
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void adc_init(void)
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{
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struct adc_struct *adc_battery = &adcdata[ADC_BATTERY];
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adc_battery->channelnum = 0x2; /* ADCVIN1, resistive divider */
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adc_battery->timeout = 0;
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_adc_read(adc_battery);
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}
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#elif CONFIG_CPU == PNX0101
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static unsigned short adcdata[NUM_ADC_CHANNELS];
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unsigned short adc_read(int channel)
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{
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return adcdata[channel];
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}
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static void adc_tick(void)
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{
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if (ADCST & 0x10) {
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adcdata[0] = ADCCH0 & 0x3ff;
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adcdata[1] = ADCCH1 & 0x3ff;
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adcdata[2] = ADCCH2 & 0x3ff;
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adcdata[3] = ADCCH3 & 0x3ff;
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adcdata[4] = ADCCH4 & 0x3ff;
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ADCST = 0xa;
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}
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}
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void adc_init(void)
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{
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ADCR24 = 0xaaaaa;
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ADCR28 = 0;
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ADCST = 2;
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ADCST = 0xa;
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while (!(ADCST & 0x10));
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adc_tick();
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tick_add_task(adc_tick);
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}
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#endif
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