rockbox/firmware/target/arm/imx233/regs/stmp3700/regs-ocotp.h
Amaury Pouly f890bd504f imx233: regenerate headers
Change-Id: I9dae85eb27337154ddb82015666773a5254cc388
2014-02-18 18:19:44 +01:00

254 lines
10 KiB
C

/***************************************************************************
* __________ __ ___.
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
* \/ \/ \/ \/ \/
* This file was automatically generated by headergen, DO NOT EDIT it.
* headergen version: 2.1.8
* XML versions: stmp3700:3.2.0
*
* Copyright (C) 2013 by Amaury Pouly
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
* KIND, either express or implied.
*
****************************************************************************/
#ifndef __HEADERGEN__STMP3700__OCOTP__H__
#define __HEADERGEN__STMP3700__OCOTP__H__
#define REGS_OCOTP_BASE (0x8002c000)
#define REGS_OCOTP_VERSION "3.2.0"
/**
* Register: HW_OCOTP_CTRL
* Address: 0
* SCT: yes
*/
#define HW_OCOTP_CTRL (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x0 + 0x0))
#define HW_OCOTP_CTRL_SET (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x0 + 0x4))
#define HW_OCOTP_CTRL_CLR (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x0 + 0x8))
#define HW_OCOTP_CTRL_TOG (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x0 + 0xc))
#define BP_OCOTP_CTRL_WR_UNLOCK 16
#define BM_OCOTP_CTRL_WR_UNLOCK 0xffff0000
#define BV_OCOTP_CTRL_WR_UNLOCK__KEY 0x3e77
#define BF_OCOTP_CTRL_WR_UNLOCK(v) (((v) << 16) & 0xffff0000)
#define BF_OCOTP_CTRL_WR_UNLOCK_V(v) ((BV_OCOTP_CTRL_WR_UNLOCK__##v << 16) & 0xffff0000)
#define BP_OCOTP_CTRL_RELOAD_SHADOWS 13
#define BM_OCOTP_CTRL_RELOAD_SHADOWS 0x2000
#define BF_OCOTP_CTRL_RELOAD_SHADOWS(v) (((v) << 13) & 0x2000)
#define BP_OCOTP_CTRL_RD_BANK_OPEN 12
#define BM_OCOTP_CTRL_RD_BANK_OPEN 0x1000
#define BF_OCOTP_CTRL_RD_BANK_OPEN(v) (((v) << 12) & 0x1000)
#define BP_OCOTP_CTRL_ERROR 9
#define BM_OCOTP_CTRL_ERROR 0x200
#define BF_OCOTP_CTRL_ERROR(v) (((v) << 9) & 0x200)
#define BP_OCOTP_CTRL_BUSY 8
#define BM_OCOTP_CTRL_BUSY 0x100
#define BF_OCOTP_CTRL_BUSY(v) (((v) << 8) & 0x100)
#define BP_OCOTP_CTRL_ADDR 0
#define BM_OCOTP_CTRL_ADDR 0x1f
#define BF_OCOTP_CTRL_ADDR(v) (((v) << 0) & 0x1f)
/**
* Register: HW_OCOTP_DATA
* Address: 0x10
* SCT: no
*/
#define HW_OCOTP_DATA (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x10))
#define BP_OCOTP_DATA_DATA 0
#define BM_OCOTP_DATA_DATA 0xffffffff
#define BF_OCOTP_DATA_DATA(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_CUSTn
* Address: 0x20+n*0x10
* SCT: no
*/
#define HW_OCOTP_CUSTn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x20+(n)*0x10))
#define BP_OCOTP_CUSTn_BITS 0
#define BM_OCOTP_CUSTn_BITS 0xffffffff
#define BF_OCOTP_CUSTn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_CRYPTOn
* Address: 0x60+n*0x10
* SCT: no
*/
#define HW_OCOTP_CRYPTOn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x60+(n)*0x10))
#define BP_OCOTP_CRYPTOn_BITS 0
#define BM_OCOTP_CRYPTOn_BITS 0xffffffff
#define BF_OCOTP_CRYPTOn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_HWCAPn
* Address: 0xa0+n*0x10
* SCT: no
*/
#define HW_OCOTP_HWCAPn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0xa0+(n)*0x10))
#define BP_OCOTP_HWCAPn_BITS 0
#define BM_OCOTP_HWCAPn_BITS 0xffffffff
#define BF_OCOTP_HWCAPn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_SWCAP
* Address: 0x100
* SCT: no
*/
#define HW_OCOTP_SWCAP (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x100))
#define BP_OCOTP_SWCAP_BITS 0
#define BM_OCOTP_SWCAP_BITS 0xffffffff
#define BF_OCOTP_SWCAP_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_CUSTCAP
* Address: 0x110
* SCT: no
*/
#define HW_OCOTP_CUSTCAP (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x110))
#define BP_OCOTP_CUSTCAP_BITS 0
#define BM_OCOTP_CUSTCAP_BITS 0xffffffff
#define BF_OCOTP_CUSTCAP_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_LOCK
* Address: 0x120
* SCT: no
*/
#define HW_OCOTP_LOCK (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x120))
#define BP_OCOTP_LOCK_ROM7 31
#define BM_OCOTP_LOCK_ROM7 0x80000000
#define BF_OCOTP_LOCK_ROM7(v) (((v) << 31) & 0x80000000)
#define BP_OCOTP_LOCK_ROM6 30
#define BM_OCOTP_LOCK_ROM6 0x40000000
#define BF_OCOTP_LOCK_ROM6(v) (((v) << 30) & 0x40000000)
#define BP_OCOTP_LOCK_ROM5 29
#define BM_OCOTP_LOCK_ROM5 0x20000000
#define BF_OCOTP_LOCK_ROM5(v) (((v) << 29) & 0x20000000)
#define BP_OCOTP_LOCK_ROM4 28
#define BM_OCOTP_LOCK_ROM4 0x10000000
#define BF_OCOTP_LOCK_ROM4(v) (((v) << 28) & 0x10000000)
#define BP_OCOTP_LOCK_ROM3 27
#define BM_OCOTP_LOCK_ROM3 0x8000000
#define BF_OCOTP_LOCK_ROM3(v) (((v) << 27) & 0x8000000)
#define BP_OCOTP_LOCK_ROM2 26
#define BM_OCOTP_LOCK_ROM2 0x4000000
#define BF_OCOTP_LOCK_ROM2(v) (((v) << 26) & 0x4000000)
#define BP_OCOTP_LOCK_ROM1 25
#define BM_OCOTP_LOCK_ROM1 0x2000000
#define BF_OCOTP_LOCK_ROM1(v) (((v) << 25) & 0x2000000)
#define BP_OCOTP_LOCK_ROM0 24
#define BM_OCOTP_LOCK_ROM0 0x1000000
#define BF_OCOTP_LOCK_ROM0(v) (((v) << 24) & 0x1000000)
#define BP_OCOTP_LOCK_HWSW_SHADOW_ALT 23
#define BM_OCOTP_LOCK_HWSW_SHADOW_ALT 0x800000
#define BF_OCOTP_LOCK_HWSW_SHADOW_ALT(v) (((v) << 23) & 0x800000)
#define BP_OCOTP_LOCK_CRYPTODCP_ALT 22
#define BM_OCOTP_LOCK_CRYPTODCP_ALT 0x400000
#define BF_OCOTP_LOCK_CRYPTODCP_ALT(v) (((v) << 22) & 0x400000)
#define BP_OCOTP_LOCK_CRYPTOKEY_ALT 21
#define BM_OCOTP_LOCK_CRYPTOKEY_ALT 0x200000
#define BF_OCOTP_LOCK_CRYPTOKEY_ALT(v) (((v) << 21) & 0x200000)
#define BP_OCOTP_LOCK_PIN 20
#define BM_OCOTP_LOCK_PIN 0x100000
#define BF_OCOTP_LOCK_PIN(v) (((v) << 20) & 0x100000)
#define BP_OCOTP_LOCK_OPS 19
#define BM_OCOTP_LOCK_OPS 0x80000
#define BF_OCOTP_LOCK_OPS(v) (((v) << 19) & 0x80000)
#define BP_OCOTP_LOCK_UN2 18
#define BM_OCOTP_LOCK_UN2 0x40000
#define BF_OCOTP_LOCK_UN2(v) (((v) << 18) & 0x40000)
#define BP_OCOTP_LOCK_UN1 17
#define BM_OCOTP_LOCK_UN1 0x20000
#define BF_OCOTP_LOCK_UN1(v) (((v) << 17) & 0x20000)
#define BP_OCOTP_LOCK_UN0 16
#define BM_OCOTP_LOCK_UN0 0x10000
#define BF_OCOTP_LOCK_UN0(v) (((v) << 16) & 0x10000)
#define BP_OCOTP_LOCK_UNALLOCATED 10
#define BM_OCOTP_LOCK_UNALLOCATED 0xfc00
#define BF_OCOTP_LOCK_UNALLOCATED(v) (((v) << 10) & 0xfc00)
#define BP_OCOTP_LOCK_CUSTCAP 9
#define BM_OCOTP_LOCK_CUSTCAP 0x200
#define BF_OCOTP_LOCK_CUSTCAP(v) (((v) << 9) & 0x200)
#define BP_OCOTP_LOCK_HWSW 8
#define BM_OCOTP_LOCK_HWSW 0x100
#define BF_OCOTP_LOCK_HWSW(v) (((v) << 8) & 0x100)
#define BP_OCOTP_LOCK_CUSTCAP_SHADOW 7
#define BM_OCOTP_LOCK_CUSTCAP_SHADOW 0x80
#define BF_OCOTP_LOCK_CUSTCAP_SHADOW(v) (((v) << 7) & 0x80)
#define BP_OCOTP_LOCK_HWSW_SHADOW 6
#define BM_OCOTP_LOCK_HWSW_SHADOW 0x40
#define BF_OCOTP_LOCK_HWSW_SHADOW(v) (((v) << 6) & 0x40)
#define BP_OCOTP_LOCK_CRYPTODCP 5
#define BM_OCOTP_LOCK_CRYPTODCP 0x20
#define BF_OCOTP_LOCK_CRYPTODCP(v) (((v) << 5) & 0x20)
#define BP_OCOTP_LOCK_CRYPTOKEY 4
#define BM_OCOTP_LOCK_CRYPTOKEY 0x10
#define BF_OCOTP_LOCK_CRYPTOKEY(v) (((v) << 4) & 0x10)
#define BP_OCOTP_LOCK_CUST3 3
#define BM_OCOTP_LOCK_CUST3 0x8
#define BF_OCOTP_LOCK_CUST3(v) (((v) << 3) & 0x8)
#define BP_OCOTP_LOCK_CUST2 2
#define BM_OCOTP_LOCK_CUST2 0x4
#define BF_OCOTP_LOCK_CUST2(v) (((v) << 2) & 0x4)
#define BP_OCOTP_LOCK_CUST1 1
#define BM_OCOTP_LOCK_CUST1 0x2
#define BF_OCOTP_LOCK_CUST1(v) (((v) << 1) & 0x2)
#define BP_OCOTP_LOCK_CUST0 0
#define BM_OCOTP_LOCK_CUST0 0x1
#define BF_OCOTP_LOCK_CUST0(v) (((v) << 0) & 0x1)
/**
* Register: HW_OCOTP_OPSn
* Address: 0x130+n*0x10
* SCT: no
*/
#define HW_OCOTP_OPSn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x130+(n)*0x10))
#define BP_OCOTP_OPSn_BITS 0
#define BM_OCOTP_OPSn_BITS 0xffffffff
#define BF_OCOTP_OPSn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_UNn
* Address: 0x170+n*0x10
* SCT: no
*/
#define HW_OCOTP_UNn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x170+(n)*0x10))
#define BP_OCOTP_UNn_BITS 0
#define BM_OCOTP_UNn_BITS 0xffffffff
#define BF_OCOTP_UNn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_ROMn
* Address: 0x1a0+n*0x10
* SCT: no
*/
#define HW_OCOTP_ROMn(n) (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x1a0+(n)*0x10))
#define BP_OCOTP_ROMn_BITS 0
#define BM_OCOTP_ROMn_BITS 0xffffffff
#define BF_OCOTP_ROMn_BITS(v) (((v) << 0) & 0xffffffff)
/**
* Register: HW_OCOTP_VERSION
* Address: 0x220
* SCT: no
*/
#define HW_OCOTP_VERSION (*(volatile unsigned long *)(REGS_OCOTP_BASE + 0x220))
#define BP_OCOTP_VERSION_MAJOR 24
#define BM_OCOTP_VERSION_MAJOR 0xff000000
#define BF_OCOTP_VERSION_MAJOR(v) (((v) << 24) & 0xff000000)
#define BP_OCOTP_VERSION_MINOR 16
#define BM_OCOTP_VERSION_MINOR 0xff0000
#define BF_OCOTP_VERSION_MINOR(v) (((v) << 16) & 0xff0000)
#define BP_OCOTP_VERSION_STEP 0
#define BM_OCOTP_VERSION_STEP 0xffff
#define BF_OCOTP_VERSION_STEP(v) (((v) << 0) & 0xffff)
#endif /* __HEADERGEN__STMP3700__OCOTP__H__ */