d1b47c2eeb
We neet to setup the XPD to work as GPIO storage unaffected Tested on working-already Clipv2 and on a 'brickable' clipv2 Change-Id: Idcbdfb6bd50d51b7f6f7e00b21df24fac9b3a6d8
307 lines
9.4 KiB
ArmAsm
307 lines
9.4 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 Rafaël Carré
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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.text
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/* AS3525 hardware registers */
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.set GPIOA, 0xC80B0000
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.set GPIOB, 0xC80C0000
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.set GPIOC, 0xC80D0000
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.set GPIOD, 0xC80E0000
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.set CGU_PROC, 0xC80F0010
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.set CGU_PERI, 0xC80F0014
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.set CGU_DBOP, 0xC80F0038
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.set CCU_IO, 0xC810000C
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.set DBOP, 0xC8120000
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.set I2C_BASE, 0xC8070000
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.set I2C_DATA, 0x00
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.set I2C_SLAD0, 0x04
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.set I2C_CNTRL, 0x0c
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.set I2C_DACNT, 0x10
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.set I2C_CPSR0, 0x1c
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.set I2C_CPSR1, 0x20
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.set I2C_IMR, 0x24
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.set I2C_SR, 0x30
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.set I2C_SADDR, 0x44
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.set AS3514_I2C_ADDR, 0x46
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.set AS3514_IRQ_ENRD0, 0x25
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.set PCLK, 24000000
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.set I2C_CLK, 400000
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.set I2C_PRESCALER, ((PCLK + I2C_CLK -1) / I2C_CLK)
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.set I2C_PRESCALER_LOW, (I2C_PRESCALER & 0xff)
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.set I2C_PRESCALER_HIGH, (I2C_PRESCALER >> 8)
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#if I2C_PRESCALER_HIGH > 3
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#error i2c prescaler too big!
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#endif
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b start @ skip our data
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/* These values are filled in by mkamsboot - don't move them from offset 0x4 */
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uclunpack_end: .word 0 /* End of the ucl_unpack function */
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uclunpack_size: .word 0 /* Size in bytes of the ucl_unpack function */
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ucl_of_end: .word 0 /* End of the ucl-compressed OF image */
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ucl_of_size: .word 0 /* Size in bytes of the compressed OF image */
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ucl_rb_end: .word 0 /* End of the ucl-compressed RB image */
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ucl_rb_size: .word 0 /* Size in bytes of the compressed RB image */
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ucl_dest: .word 0 /* End of our destination buffer (end of memory) */
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start:
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/* First copy the UCL unpack function to the end of RAM */
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ldr r0, uclunpack_end /* Source */
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ldr r1, uclunpack_size /* Source length */
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sub r2, r0, r1 /* Source start - 1*/
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ldr r3, ucl_dest /* Destination end */
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uclcopy:
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ldrb r4, [r0], #-1
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strb r4, [r3], #-1
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cmp r2, r0
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bne uclcopy
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/* store the new destination buffer */
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str r3, ucl_dest
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/* enable gpio clock */
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ldr r0, =CGU_PERI
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ldr r1, [r0]
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orr r1, r1, #(1<<16)
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str r1, [r0]
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/* Here are model specific tests for dual boot (test left button) */
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#ifdef SANSA_CLIP
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.set row, (1<<5) /* enable output on C5 */
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.set col, (1<<0) /* read keyscan column B0 */
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ldr r0, =GPIOC
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mov r1, #row
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str r1, [r0, #0x400]
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str r1, [r0, #(4*row)]
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ldr r0, =GPIOB
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mov r1, #0
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str r1, [r0, #0x400]
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ldr r1, [r0, #(4*col)]
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cmp r1, #0
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bne boot_of
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#elif defined(SANSA_CLIPV2)
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.set row, (1<<4) /* enable output on D4 */
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.set col, (1<<0) /* read keyscan column D0 */
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ldr r0, =CCU_IO
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ldr r1, [r0]
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bic r1, r1, #(3<<2) @ XPD works as general purpose IO
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str r1, [r0]
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ldr r0, =GPIOD
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mov r1, #((1<<5)|(1<<4)|(1<<3)) /* all rows as output */
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str r1, [r0, #0x400]
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/* all rows high */
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mov r1, #(1<<3)
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str r1, [r0, #(4*(1<<3))]
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mov r1, #(1<<4)
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str r1, [r0, #(4*(1<<4))]
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mov r1, #(1<<5)
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str r1, [r0, #(4*(1<<5))]
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mov r1, #0 /* button row low */
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str r1, [r0, #(4*row)]
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mov r1, #5 /* small delay */
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1: subs r1, r1, #1
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bne 1b
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ldr r1, [r0, #(4*col)]
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cmp r1, #0
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beq boot_of
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#elif defined(SANSA_E200V2) || defined(SANSA_FUZE)
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ldr r0, =GPIOC
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mov r1, #0
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str r1, [r0, #0x400]
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ldr r1, [r0, #0x20] /* read pin C3 */
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cmp r1, #0 /* C3 = #0 means button pressed */
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beq boot_of
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#elif defined(SANSA_FUZEV2)
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ldr r0, =GPIOC
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mov r1, #0
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str r1, [r0, #0x400]
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ldr r1, [r0, #0x20] /* read pin C3 */
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cmp r1, #0 /* C3 != #0 means button pressed */
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bne boot_of
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#elif defined(SANSA_CLIPPLUS)
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@ read pins
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ldr r0, =GPIOC
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ldr r1, [r0, #4*(1<<3)] @ read pin C3 "|<<"
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ldr r0, =GPIOA
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ldr r2, [r0, #4*(1<<1)] @ read pin A1 "Home"
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orr r2, r2, r1 @ c3 || A1
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cmp r2, #0 @ test input from pins
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bne boot_of @ branch directly to OF if either pin high
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#elif defined(SANSA_CLIPZIP)
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@ read pins
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ldr r0, =GPIOA
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ldr r1, [r0, #4*(1<<6)] @ read GPIO A6 "vol-"
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cmp r1, #0 @ test input from pins
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bne boot_of @ branch directly to OF if either pin high
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ldr r0, =GPIOC
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ldr r1, [r0, #0x400]
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orr r1, r1, #((1<<1)|(1<<2)) @ output
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bic r1, r1, #(1<<5) @ input
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str r1, [r0, #0x400]
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mov r1, #0
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str r1, [r0, #4*(1<<1)] @ zero C1
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mov r1, #(1<<2)
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str r1, [r0, #4*(1<<2)] @ set C2
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mov r1, #50 /* small delay */
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1: subs r1, r1, #1
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bne 1b
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ldr r1, [r0, #4*(1<<5)] @ read C5 = left
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cmp r1, #0
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bne boot_of
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#elif defined(SANSA_C200V2)
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.set BUTTON_LEFT, (1<< 2)
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.set BUTTON_DOWN, (1<< 3)
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.set BUTTON_SELECT, (1<< 4)
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.set BUTTON_UP, (1<< 5)
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.set BUTTON_RIGHT, (1<< 6)
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.set BUTTON_HOLD, (1<<12)
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ldr r0, =CGU_DBOP
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mov r1, #(1<<3) @ DBOP freq = PCLK, clock enabled
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str r1, [r0]
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@ AFSEL needs to be set for this to work
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ldr r2, =GPIOB
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mov r1, #0xc
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str r1, [r2, #0x420] @ GPIOB_AFSEL
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ldr r2, =GPIOC
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mov r1, #0xff
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str r1, [r2, #0x420] @ GPIOC_AFSEL
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ldr r0, =DBOP
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@ TIMPOL doesn't matter here since we don't need
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@ the control signals.
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@ 16 bit data width
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@ enable write
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@ tri-state output
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ldr r1, =0x00091000
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str r1, [r0, #8] @ DBOP_CTRL
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ldr r1, =0xf0ff @ precharge
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str r1, [r0, #0x10] @ DBOP_DOUT
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2: ldr r1, [r0, #0xc] @ DOBP_STAT
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ands r1, r1, #(1<<10)
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beq 2b @ make sure fifo is empty
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@ 16 bit data width
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@ start read
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@ tri-state output
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@ strobe time 31
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ldr r1, =0x0008901f
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str r1, [r0, #8] @ DBOP_CTRL
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3: ldr r1, [r0, #0xc] @ DOBP_STAT
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ands r1, r1, #(1<<16)
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beq 3b @ wait for valid data
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ldrh r1, [r0, #0x14] @ DBOP_DIN
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tst r1, #BUTTON_LEFT @ boot of?
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beq boot_of
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#elif defined(SANSA_M200V4)
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.set row, (1<<5) /* enable output on A5 */
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.set col, (1<<0) /* read keyscan column A0 */
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ldr r0, =GPIOA
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mov r1, #row
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str r1, [r0, #0x400]
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str r1, [r0, #(4*row)]
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ldr r2, [r0, #(4*col)]
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/* check value read (1 means button pressed) */
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cmp r2, #0
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bne boot_of
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#else
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#error No target-specific key check defined!
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#endif
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/* The dualboot button was not held, so we boot rockbox */
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ldr r0, ucl_rb_end /* Address of compressed image */
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ldr r1, ucl_rb_size /* Compressed size */
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b decompress
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boot_of:
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ldr r0, ucl_of_end /* Address of compressed image */
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ldr r1, ucl_of_size /* Compressed size */
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decompress:
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/* At this point: */
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/* r0 = source_end for UCL image to copy */
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/* r1 = size of UCL image to copy */
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ldr r3, ucl_dest
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add r5, r3, #2 /* r5 is entry point of copy of uclunpack */
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/* function, plus one (for thumb mode */
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sub r4, r3, r1 /* r4 := destination_start - 1 */
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fw_copy:
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ldrb r2, [r0], #-1
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strb r2, [r3], #-1
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cmp r3, r4 /* Stop when we reached dest_start-1 */
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bne fw_copy
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/* Call the ucl decompress function, which will branch to 0x0 */
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/* on completion */
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add r0, r3, #1 /* r0 := Start of compressed image */
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/* r1 already contains compressed size */
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mov r2, #0 /* r2 := Destination for unpacking */
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bx r5 /* Branch to uclunpack, switching to thumb */
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/* never reached : uclunpack will branch to the reset vector (0x0) */
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