06ec18d93f
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16833 a1c6a512-1295-4272-9138-f99709370657
318 lines
8.3 KiB
ArmAsm
318 lines
8.3 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Jens Arnold
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#define CLOCK_MASK 0x00004000
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#define DATA_MASK 0x00002000
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#define RS_MASK 0x00008000
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#define GPIO_OUT_ADDR 0x80000004
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#define CS_MASK 0x00000020
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#define GPIO1_OUT_ADDR 0x800000b4
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.extern cpu_frequency /* Global variable from system.c */
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.section .icode,"ax",@progbits
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/* Output 8 bits to the LCD. Instruction order is devised to maximize the
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* delay between changing the data line and the CLK L->H transition, which
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* makes the LCD controller sample DATA.
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* Requires CLK = 1 on entry.
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*
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* Custom calling convention:
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* %a0 - GPIO_OUT_ADDR
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* %d3 - data byte
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* %d6 - DATA_MASK
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* %d7 - CLOCK_MASK
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* Clobbers:
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* %d0..%d3
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*/
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.write_byte:
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move.w %sr, %d2
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move.w #0x2700, %sr
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move.l (%a0), %d0 /* Get current state of data port */
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move.l %d0, %d1
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and.l %d6, %d1 /* Check current state of data line */
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beq.s 1f /* and set it as previous-state bit */
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bset #8, %d3
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1:
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move.l %d3, %d1 /* Compute the 'bit derivative', i.e. a value */
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lsr.l #1, %d1 /* with 1's where the data changes from the */
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eor.l %d1, %d3 /* previous state, and 0's where it doesn't */
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swap %d3 /* Shift data to upper byte */
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lsl.l #8, %d3
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eor.l %d7, %d0 /* precalculate opposite state of clock line */
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lsl.l #1,%d3 /* Shift out MSB */
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bcc.s 1f
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eor.l %d6, %d0 /* 1: Flip data bit */
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1:
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move.l %d0, (%a0) /* Output new state and set CLK = 0*/
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move.l %d0, %d1
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eor.l %d7, %d1
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bra.w .wr_bit7
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/* Output 16 bits to the LCD. Instruction order is devised to maximize the
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* delay between changing the data line and the CLK L->H transition, which
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* makes the LCD controller sample DATA.
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* Requires CLK = 1 on entry.
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*
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* Custom calling convention:
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* %a0 - GPIO_OUT_ADDR
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* %d3 - data word
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* %d6 - DATA_MASK
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* %d7 - CLOCK_MASK
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* Clobbers:
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* %d0..%d3
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*/
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.write_word:
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move.w %sr, %d2
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move.w #0x2700, %sr
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move.l (%a0), %d0 /* Get current state of data port */
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move.l %d0, %d1
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and.l %d6, %d1 /* Check current state of data line */
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beq.s 1f /* and set it as previous-state bit */
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bset #16, %d3
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1:
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move.l %d3, %d1 /* Compute the 'bit derivative', i.e. a value */
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lsr.l #1, %d1 /* with 1's where the data changes from the */
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eor.l %d1, %d3 /* previous state, and 0's where it doesn't */
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swap %d3 /* Shift data to upper word */
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eor.l %d7, %d0 /* precalculate opposite state of clock line */
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lsl.l #1,%d3 /* Shift out MSB */
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bcc.s 1f
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eor.l %d6, %d0 /* 1: Flip data bit */
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1:
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move.l %d0, (%a0) /* Output new state and set CLK = 0*/
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move.l %d0, %d1
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eor.l %d7, %d1
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nop
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.macro bit_out
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lsl.l #1,%d3
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bcc.s 1f
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eor.l %d6, %d0
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1:
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move.l %d1, (%a0) /* Set CLK = 1 (delayed) */
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move.l %d0, (%a0)
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move.l %d0, %d1
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eor.l %d7, %d1
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.endm
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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.wr_bit7:
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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bit_out
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nop
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nop
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move.l %d1, (%a0) /* Set CLK = 1 (delayed) */
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move.w %d2, %sr
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rts
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/* Output 16 bits to the LCD as fast as possible. Use only at < 60MHz.
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*
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* Custom calling convention:
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* %a0 - GPIO_OUT_ADDR
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* %d3 - data word
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* %d6 - DATA_MASK
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* %d7 - CLOCK_MASK
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* Clobbers:
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* %d0..%d3
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*/
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.write_word_fast:
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move.w %sr, %d2 /* Get current interrupt level */
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move.w #0x2700, %sr /* Disable interrupts */
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move.l (%a0), %d0 /* Get current state of data port */
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move.l %d0, %d1
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and.l %d6, %d1 /* Check current state of data line */
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beq.s 1f /* and set it as previous-state bit */
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bset #16, %d3
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1:
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move.l %d3, %d1 /* Compute the 'bit derivative', i.e. a value */
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lsr.l #1, %d1 /* with 1's where the data changes from the */
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eor.l %d1, %d3 /* previous state, and 0's where it doesn't */
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swap %d3 /* Shift data to upper byte */
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move.l %d0, %d1 /* precalculate opposite state of clock line */
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eor.l %d7, %d1
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.macro bit_out_fast
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lsl.l #1,%d3 /* Shift out MSB */
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bcc.s 1f
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eor.l %d6, %d0 /* 1: Flip data bit */
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eor.l %d6, %d1 /* for both clock states */
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1:
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move.l %d1, (%a0) /* Output new state and set CLK = 0*/
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move.l %d0, (%a0) /* set CLK = 1 */
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.endm
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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bit_out_fast
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move.w %d2, %sr /* Restore interrupt level */
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rts
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.global lcd_remote_write_command
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.type lcd_remote_write_command, @function
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lcd_remote_write_command:
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lea.l (-4*4, %sp), %sp
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movem.l %d2-%d3/%d6-%d7, (%sp)
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move.l (4*4+4, %sp), %d3 /* cmd */
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lea.l GPIO_OUT_ADDR, %a0
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lea.l GPIO1_OUT_ADDR, %a1
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move.l #DATA_MASK, %d6
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move.l #CLOCK_MASK, %d7
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move.l #~RS_MASK, %d0
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and.l %d0, (%a0)
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move.l #~CS_MASK, %d0
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and.l %d0, (%a1)
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bsr.w .write_byte
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move.l #CS_MASK, %d0
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or.l %d0, (%a1)
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movem.l (%sp), %d2-%d3/%d6-%d7
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lea.l (4*4, %sp), %sp
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rts
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.global lcd_remote_write_command_ex
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.type lcd_remote_write_command_ex, @function
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lcd_remote_write_command_ex:
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lea.l (-4*4, %sp), %sp
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movem.l %d2-%d3/%d6-%d7, (%sp)
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movem.l (4*4+4, %sp), %d2-%d3 /* cmd, data */
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lea.l GPIO_OUT_ADDR, %a0
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lea.l GPIO1_OUT_ADDR, %a1
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move.l #DATA_MASK, %d6
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move.l #CLOCK_MASK, %d7
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move.l #~RS_MASK, %d0
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and.l %d0, (%a0)
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move.l #~CS_MASK, %d0
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and.l %d0, (%a1)
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lsl.l #8, %d2
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or.l %d2, %d3
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bsr.w .write_word
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move.l #CS_MASK, %d0
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or.l %d0, (%a1)
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movem.l (%sp), %d2-%d3/%d6-%d7
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lea.l (4*4, %sp), %sp
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rts
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.global lcd_remote_write_data
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.type lcd_remote_write_data, @function
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lcd_remote_write_data:
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lea.l (-7*4, %sp), %sp
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movem.l %d2-%d4/%d6-%d7/%a2-%a3, (%sp)
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move.l (7*4+4, %sp), %a2 /* p_words */
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move.l (7*4+8, %sp), %d4 /* count */
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lea.l GPIO_OUT_ADDR, %a0
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lea.l GPIO1_OUT_ADDR, %a1
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move.l #DATA_MASK, %d6
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move.l #CLOCK_MASK, %d7
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lea.l .write_word, %a3
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move.l cpu_frequency, %d0
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cmp.l #60000000, %d0
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bhi.b 1f
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lea.l .write_word_fast, %a3
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1:
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move.l #RS_MASK, %d0
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or.l %d0, (%a0)
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move.l #~CS_MASK, %d0
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and.l %d0, (%a1)
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.wd_loop:
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clr.l %d3
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move.w (%a2)+, %d3
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jsr (%a3)
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subq.l #1, %d4
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bne.s .wd_loop
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move.l #CS_MASK, %d0
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or.l %d0, (%a1)
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movem.l (%sp), %d2-%d4/%d6-%d7/%a2-%a3
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lea.l (7*4, %sp), %sp
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rts
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