954b732654
Rockbox firmware has been flashed over original firmware (not yet possible to do). Dircache & tagcache serialization for fast bootup without the need to scan disk when Rockbox is in flash. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10464 a1c6a512-1295-4272-9138-f99709370657
377 lines
7.2 KiB
C
377 lines
7.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Miika Pekkarinen
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "lcd.h"
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#include "cpu.h"
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#include "system.h"
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#include "kernel.h"
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#include "thread.h"
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#include "debug.h"
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#include "logf.h"
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#include "sprintf.h"
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#include "string.h"
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#include "eeprom_24cxx.h"
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/**
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* I2C-functions are copied and ported from fmradio.c.
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*/
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#define SW_I2C_WRITE 0
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#define SW_I2C_READ 1
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/* cute little functions, atomic read-modify-write */
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/* SCL is GPIO, 12 */
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#define SCL_LO and_l(~0x00001000, &GPIO_OUT) // and_b(~0x10, &PBDRL)
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#define SCL_HI or_l( 0x00001000, &GPIO_OUT) // or_b( 0x10, &PBDRL)
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#define SCL_INPUT and_l(~0x00001000, &GPIO_ENABLE) // and_b(~0x10, &PBIORL)
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#define SCL_OUTPUT or_l( 0x00001000, &GPIO_ENABLE) // or_b( 0x10, &PBIORL)
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#define SCL ( 0x00001000 & GPIO_READ) // (PBDR & 0x0010)
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/* SDA is GPIO1, 13 */
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#define SDA_LO and_l(~0x00002000, &GPIO1_OUT) // and_b(~0x02, &PBDRL)
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#define SDA_HI or_l( 0x00002000, &GPIO1_OUT) // or_b( 0x02, &PBDRL)
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#define SDA_INPUT and_l(~0x00002000, &GPIO1_ENABLE) // and_b(~0x02, &PBIORL)
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#define SDA_OUTPUT or_l( 0x00002000, &GPIO1_ENABLE) // or_b( 0x02, &PBIORL)
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#define SDA ( 0x00002000 & GPIO1_READ) // (PBDR & 0x0002)
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/* delay loop to achieve 400kHz at 120MHz CPU frequency */
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#define DELAY do { int _x; for(_x=0;_x<22;_x++);} while(0)
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static void sw_i2c_init(void)
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{
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logf("sw_i2c_init");
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or_l(0x00001000, &GPIO_FUNCTION);
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or_l(0x00002000, &GPIO1_FUNCTION);
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SDA_HI;
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SCL_HI;
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SDA_OUTPUT;
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SCL_OUTPUT;
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}
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static void sw_i2c_start(void)
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{
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SCL_LO;
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SCL_OUTPUT;
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DELAY;
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SDA_HI;
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SDA_OUTPUT;
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DELAY;
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SCL_HI;
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DELAY;
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SDA_LO;
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DELAY;
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SCL_LO;
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}
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static void sw_i2c_stop(void)
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{
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// SCL_LO;
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// DELAY;
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// SDA_LO;
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// DELAY;
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SCL_HI;
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DELAY;
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SDA_HI;
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DELAY;
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}
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static void sw_i2c_ack(void)
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{
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SCL_LO;
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SDA_LO;
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DELAY;
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SCL_HI;
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DELAY;
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}
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static int sw_i2c_getack(void)
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{
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int ret = 1;
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int count = 10;
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SCL_LO;
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SDA_INPUT; /* And set to input */
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DELAY;
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SCL_HI;
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DELAY;
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while (SDA && count--)
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DELAY;
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if (SDA)
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/* ack failed */
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ret = 0;
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SCL_LO;
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SCL_OUTPUT;
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DELAY;
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SDA_LO;
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SDA_OUTPUT;
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return ret;
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}
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static void sw_i2c_outb(unsigned char byte)
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{
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int i;
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/* clock out each bit, MSB first */
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for ( i=0x80; i; i>>=1 ) {
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SCL_LO;
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DELAY;
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if ( i & byte )
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SDA_HI;
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else
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SDA_LO;
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DELAY;
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SCL_HI;
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DELAY;
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}
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// SDA_LO;
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}
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static unsigned char sw_i2c_inb(void)
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{
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int i;
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unsigned char byte = 0;
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SDA_INPUT; /* And set to input */
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/* clock in each bit, MSB first */
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for ( i=0x80; i; i>>=1 )
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{
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SCL_HI;
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DELAY;
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if ( SDA )
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byte |= i;
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SCL_LO;
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DELAY;
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}
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SDA_OUTPUT;
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sw_i2c_ack();
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return byte;
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}
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int sw_i2c_write(int location, const unsigned char* buf, int count)
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{
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int i;
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sw_i2c_start();
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sw_i2c_outb((EEPROM_ADDR & 0xfe) | SW_I2C_WRITE);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -1;
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}
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sw_i2c_outb(location);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -2;
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}
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for (i=0; i<count; i++)
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{
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sw_i2c_outb(buf[i]);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -3;
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}
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}
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sw_i2c_stop();
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return 0;
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}
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int sw_i2c_write_byte(int location, unsigned char byte)
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{
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sw_i2c_start();
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sw_i2c_outb((EEPROM_ADDR & 0xfe) | SW_I2C_WRITE);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -1;
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}
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sw_i2c_outb(location);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -2;
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}
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sw_i2c_outb(byte);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -3;
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}
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sw_i2c_stop();
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return 0;
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}
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int sw_i2c_read(unsigned char location, unsigned char* byte)
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{
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sw_i2c_start();
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sw_i2c_outb((EEPROM_ADDR & 0xfe) | SW_I2C_WRITE);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -1;
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}
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sw_i2c_outb(location);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -2;
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}
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sw_i2c_start();
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sw_i2c_outb((EEPROM_ADDR & 0xfe) | SW_I2C_READ);
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if (!sw_i2c_getack())
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{
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sw_i2c_stop();
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return -3;
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}
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*byte = sw_i2c_inb();
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sw_i2c_stop();
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return 0;
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}
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void eeprom_24cxx_init(void)
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{
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sw_i2c_init();
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}
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bool eeprom_24cxx_read_byte(unsigned int address, char *c)
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{
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int ret;
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char byte;
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int count = 10;
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if (address >= EEPROM_SIZE)
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{
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logf("EEPROM address: %d", address);
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return false;
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}
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*c = 0;
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do {
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ret = sw_i2c_read(address, &byte);
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if (ret < 0)
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{
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logf("EEPROM Fail: %d/%d", ret, address);
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}
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} while (ret < 0 && count--) ;
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if (ret < 0)
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{
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logf("EEPROM RFail: %d/%d", ret, address);
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return false;
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}
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*c = byte;
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return true;
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}
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bool eeprom_24cxx_write_byte(unsigned int address, char c)
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{
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int ret;
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int count = 100;
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if (address >= EEPROM_SIZE)
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{
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logf("EEPROM address: %d", address);
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return false;
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}
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do {
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ret = sw_i2c_write_byte(address, c);
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} while (ret < 0 && count--) ;
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if (ret < 0)
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{
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logf("EEPROM WFail: %d/%d", ret, address);
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return false;
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}
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return true;
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}
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bool eeprom_24cxx_read(unsigned char address, void *dest, int length)
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{
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char *buf = (char *)dest;
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int i;
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for (i = 0; i < length; i++)
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{
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if (!eeprom_24cxx_read_byte(address+i, &buf[i]))
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return false;
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}
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return true;
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}
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bool eeprom_24cxx_write(unsigned char address, const void *src, int length)
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{
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const char *buf = (const char *)src;
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int count = 10;
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int i, ok;
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while (count-- > 0)
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{
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for (i = 0; i < length; i++)
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eeprom_24cxx_write_byte(address+i, buf[i]);
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ok = true;
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for (i = 0; i < length; i++)
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{
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char byte;
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eeprom_24cxx_read_byte(address+i, &byte);
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if (byte != buf[i])
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{
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logf("Verify failed: %d/%d", address+i, count);
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ok = false;
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break;
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}
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}
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if (ok)
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return true;
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}
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return false;
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}
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