e85bc74b30
The GPIO API was pretty clunky and pin settings were decentralized, making it hard to see what was happening and making GPIO stuff look like a mess, frankly. Instead of passing clunky (port, pin) pairs everywhere, GPIOs are now identified with a single int. The extra overhead should be minimal as GPIO configuration is generally not on a performance-critical path. Pin assignments are now mostly consolidated in gpio-target.h and put in various tables so gpio_init() can assign most pins at boot time. Most drivers no longer need to touch GPIOs and basic pin I/O stuff can happen without config since pins are put into the right state. IRQ pins still need to be configured manually before use. Change-Id: Ic5326284b0b2a2f613e9e76a41cb50e24af3aa47
247 lines
6 KiB
C
247 lines
6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "kernel.h"
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#include "audio.h"
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#include "audiohw.h"
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#include "pcm.h"
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#include "pcm-internal.h"
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#include "panic.h"
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#include "dma-x1000.h"
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#include "irq-x1000.h"
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#include "x1000/aic.h"
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#include "x1000/cpm.h"
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#define AIC_STATE_STOPPED 0
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#define AIC_STATE_PLAYING 1
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volatile unsigned aic_tx_underruns = 0;
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static int aic_state = AIC_STATE_STOPPED;
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static int aic_lock = 0;
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static volatile int aic_dma_pending_event = DMA_EVENT_NONE;
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static dma_desc aic_dma_desc;
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static void pcm_play_dma_int_cb(int event);
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#ifdef HAVE_RECORDING
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static void pcm_rec_dma_int_cb(int event);
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#endif
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void pcm_play_dma_init(void)
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{
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/* Ungate clock, assign pins. NB this overlaps with pins labeled "sa0-sa4"
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* on Ingenic's datasheets but I'm not sure what they are. Probably safe to
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* assume they are not useful to Rockbox... */
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jz_writef(CPM_CLKGR, AIC(0));
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/* Configure AIC with some sane defaults */
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jz_writef(AIC_CFG, RST(1));
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jz_writef(AIC_I2SCR, STPBK(1));
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jz_writef(AIC_CFG, MSB(0), LSMP(1), ICDC(0), AUSEL(1), BCKD(0), SYNCD(0));
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jz_writef(AIC_CCR, ENDSW(0), ASVTSU(0));
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jz_writef(AIC_I2SCR, RFIRST(0), ESCLK(0), AMSL(0));
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jz_write(AIC_SPENA, 0);
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/* Let the target initialize its hardware and setup the AIC */
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audiohw_init();
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/* Program audio format (stereo, packed 16 bit samples) */
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jz_writef(AIC_CCR, PACK16(1), CHANNEL_V(STEREO),
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OSS_V(16BIT), ISS_V(16BIT), M2S(0));
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jz_writef(AIC_I2SCR, SWLH(0));
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/* Set DMA settings */
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jz_writef(AIC_CFG, TFTH(16), RFTH(16));
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dma_set_callback(DMA_CHANNEL_AUDIO, pcm_play_dma_int_cb);
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#ifdef HAVE_RECORDING
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dma_set_callback(DMA_CHANNEL_RECORD, pcm_rec_dma_int_cb);
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#endif
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/* Mask all interrupts and disable playback/recording */
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jz_writef(AIC_CCR, EROR(0), ETUR(0), ERFS(0), ETFS(0),
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ENLBF(0), ERPL(0), EREC(0));
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/* Enable the controller */
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jz_writef(AIC_CFG, ENABLE(1));
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/* Enable interrupts */
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system_enable_irq(IRQ_AIC);
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}
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void pcm_play_dma_postinit(void)
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{
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audiohw_postinit();
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}
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void pcm_dma_apply_settings(void)
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{
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audiohw_set_frequency(pcm_fsel);
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}
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static void pcm_dma_start(const void* addr, size_t size)
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{
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aic_dma_desc.cm = jz_orf(DMA_CHN_CM, SAI(1), DAI(0), RDIL(9),
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SP_V(32BIT), DP_V(32BIT), TSZ_V(AUTO),
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STDE(0), TIE(1), LINK(0));
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aic_dma_desc.sa = PHYSADDR(addr);
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aic_dma_desc.ta = PHYSADDR(JA_AIC_DR);
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aic_dma_desc.tc = size;
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aic_dma_desc.sd = 0;
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aic_dma_desc.rt = jz_orf(DMA_CHN_RT, TYPE_V(I2S_TX));
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aic_dma_desc.pad0 = 0;
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aic_dma_desc.pad1 = 0;
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commit_dcache_range(&aic_dma_desc, sizeof(dma_desc));
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commit_dcache_range(addr, size);
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REG_DMA_CHN_DA(DMA_CHANNEL_AUDIO) = PHYSADDR(&aic_dma_desc);
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jz_writef(DMA_CHN_CS(DMA_CHANNEL_AUDIO), DES8(1), NDES(0));
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jz_set(DMA_DB, 1 << DMA_CHANNEL_AUDIO);
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jz_writef(DMA_CHN_CS(DMA_CHANNEL_AUDIO), CTE(1));
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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static void pcm_dma_handle_event(int event)
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{
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if(event == DMA_EVENT_COMPLETE) {
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const void* addr;
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size_t size;
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if(pcm_play_dma_complete_callback(PCM_DMAST_OK, &addr, &size))
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pcm_dma_start(addr, size);
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} else if(event == DMA_EVENT_NONE) {
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/* ignored, so callers don't need to check for this */
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} else {
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pcm_play_dma_status_callback(PCM_DMAST_ERR_DMA);
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}
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}
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static void pcm_play_dma_int_cb(int event)
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{
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if(aic_lock) {
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aic_dma_pending_event = event;
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return;
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} else {
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pcm_dma_handle_event(event);
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}
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}
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void pcm_play_dma_start(const void* addr, size_t size)
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{
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aic_dma_pending_event = DMA_EVENT_NONE;
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aic_state = AIC_STATE_PLAYING;
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pcm_dma_start(addr, size);
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jz_writef(AIC_CCR, TDMS(1), ETUR(1), ERPL(1));
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}
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void pcm_play_dma_stop(void)
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{
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jz_writef(AIC_CCR, TDMS(0), ETUR(0), ERPL(0));
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jz_writef(AIC_CCR, TFLUSH(1));
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aic_dma_pending_event = DMA_EVENT_NONE;
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aic_state = AIC_STATE_STOPPED;
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}
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void pcm_play_lock(void)
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{
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++aic_lock;
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}
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void pcm_play_unlock(void)
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{
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int irq = disable_irq_save();
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if(--aic_lock == 0 && aic_state == AIC_STATE_PLAYING) {
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pcm_dma_handle_event(aic_dma_pending_event);
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aic_dma_pending_event = DMA_EVENT_NONE;
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}
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restore_irq(irq);
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}
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#ifdef HAVE_RECORDING
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/*
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* Recording
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*/
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/* FIXME need to implement this!! */
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static void pcm_rec_dma_int_cb(int event)
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{
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(void)event;
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}
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void pcm_rec_dma_init(void)
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{
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}
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void pcm_rec_dma_close(void)
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{
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}
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void pcm_rec_dma_start(void* addr, size_t size)
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{
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(void)addr;
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(void)size;
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}
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void pcm_rec_dma_stop(void)
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{
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}
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void pcm_rec_lock(void)
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{
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}
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void pcm_rec_unlock(void)
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{
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}
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const void* pcm_rec_dma_get_peak_buffer(void)
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{
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return NULL;
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}
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void audio_set_output_source(int source)
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{
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(void)source;
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}
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void audio_input_mux(int source, unsigned flags)
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{
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(void)source;
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(void)flags;
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}
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#endif /* HAVE_RECORDING */
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void AIC(void)
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{
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if(jz_readf(AIC_SR, TUR)) {
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aic_tx_underruns += 1;
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jz_writef(AIC_SR, TUR(0));
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}
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}
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