9b7ec42403
Sync to commit bb4b6885a139644cf3ac14e7deda9f633ec2d93c
This brings in a bunch of optimizations to decode speed
and memory usage. Allocations are switched from using
the pseudostack to using the real stack. Enabled hacks
to reduce stack usage.
This should fix crashes on sansa clip, although some
files will not play due to failing allocations in the
codec buffer.
Speeds up decoding of the following test files:
H300 (cf) C200 (arm7tdmi) ipod classic (arm9e)
16 kbps (silk) 14.28 MHz 4.00 MHz 2.61 MHz
64 kbps (celt) 4.09 MHz 8.08 MHz 6.24 MHz
128 kbps (celt) 1.93 MHz 8.83 MHz 6.53 MHz
Change-Id: I851733a8a5824b61feb363a173091bc7e6629b58
80 lines
2.9 KiB
C
80 lines
2.9 KiB
C
/* Copyright (C) 2013 Xiph.Org Foundation and contributors */
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER
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OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef FIXED_ARMv4_H
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#define FIXED_ARMv4_H
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/** 16x32 multiplication, followed by a 16-bit shift right. Results fits in 32 bits */
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#undef MULT16_32_Q16
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static OPUS_INLINE opus_val32 MULT16_32_Q16_armv4(opus_val16 a, opus_val32 b)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#MULT16_32_Q16\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(b),"r"(a<<16)
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);
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return rd_hi;
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}
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#define MULT16_32_Q16(a, b) (MULT16_32_Q16_armv4(a, b))
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/** 16x32 multiplication, followed by a 15-bit shift right. Results fits in 32 bits */
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#undef MULT16_32_Q15
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static OPUS_INLINE opus_val32 MULT16_32_Q15_armv4(opus_val16 a, opus_val32 b)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#MULT16_32_Q15\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(b), "r"(a<<16)
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);
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/*We intentionally don't OR in the high bit of rd_lo for speed.*/
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return rd_hi<<1;
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}
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#define MULT16_32_Q15(a, b) (MULT16_32_Q15_armv4(a, b))
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/** 16x32 multiply, followed by a 15-bit shift right and 32-bit add.
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b must fit in 31 bits.
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Result fits in 32 bits. */
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#undef MAC16_32_Q15
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#define MAC16_32_Q15(c, a, b) ADD32(c, MULT16_32_Q15(a, b))
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/** 16x32 multiply, followed by a 16-bit shift right and 32-bit add.
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Result fits in 32 bits. */
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#undef MAC16_32_Q16
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#define MAC16_32_Q16(c, a, b) ADD32(c, MULT16_32_Q16(a, b))
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/** 32x32 multiplication, followed by a 31-bit shift right. Results fits in 32 bits */
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#undef MULT32_32_Q31
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#define MULT32_32_Q31(a,b) (opus_val32)((((opus_int64)(a)) * ((opus_int64)(b)))>>31)
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#endif
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