264 lines
6.6 KiB
C
264 lines
6.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: pcm-s5l8700.c 28600 2010-11-14 19:49:20Z Buschel $
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*
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* Copyright © 2011 Michael Sparmann
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include <string.h>
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#include "config.h"
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#include "system.h"
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#include "audio.h"
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#include "s5l8702.h"
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#include "panic.h"
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#include "audiohw.h"
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#include "pcm.h"
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#include "pcm-internal.h"
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#include "pcm_sampr.h"
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#include "mmu-arm.h"
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#include "pcm-target.h"
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static volatile int locked = 0;
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static const int zerosample = 0;
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static unsigned char dblbuf[2][PCM_WATERMARK * 4];
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static int active_dblbuf;
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struct dma_lli pcm_lli[PCM_LLICOUNT] __attribute__((aligned(16)));
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static struct dma_lli* lastlli;
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static const void* dataptr;
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size_t pcm_remaining;
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size_t pcm_chunksize;
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/* Mask the DMA interrupt */
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void pcm_play_lock(void)
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{
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if (locked++ == 0) {
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//TODO: Urgh, I don't like that at all...
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VIC0INTENCLEAR = 1 << IRQ_DMAC0;
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}
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}
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/* Unmask the DMA interrupt if enabled */
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void pcm_play_unlock(void)
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{
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if (--locked == 0) {
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VIC0INTENABLE = 1 << IRQ_DMAC0;
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}
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}
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void INT_DMAC0C0(void) ICODE_ATTR;
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void INT_DMAC0C0(void)
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{
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DMAC0INTTCCLR = 1;
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if (!pcm_remaining)
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{
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pcm_play_dma_complete_callback(PCM_DMAST_OK, &dataptr, &pcm_remaining);
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pcm_chunksize = pcm_remaining;
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}
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if (!pcm_remaining)
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{
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pcm_lli->nextlli = NULL;
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pcm_lli->control = 0x7524a000;
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commit_dcache();
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return;
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}
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uint32_t lastsize = MIN(PCM_WATERMARK * 4, pcm_remaining / 2 + 1) & ~1;
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pcm_remaining -= lastsize;
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if (pcm_remaining) lastlli = &pcm_lli[ARRAYLEN(pcm_lli) - 1];
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else lastlli = pcm_lli;
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uint32_t chunksize = MIN(PCM_CHUNKSIZE * 4 - lastsize, pcm_remaining);
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if (pcm_remaining > chunksize && chunksize > pcm_remaining - PCM_WATERMARK * 8)
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chunksize = pcm_remaining - PCM_WATERMARK * 8;
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pcm_remaining -= chunksize;
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bool last = !chunksize;
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int i = 0;
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while (chunksize)
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{
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uint32_t thislli = MIN(PCM_LLIMAX * 4, chunksize);
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chunksize -= thislli;
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pcm_lli[i].srcaddr = (void*)dataptr;
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pcm_lli[i].dstaddr = (void*)((int)&I2STXDB0);
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pcm_lli[i].nextlli = chunksize ? &pcm_lli[i + 1] : lastlli;
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pcm_lli[i].control = (chunksize ? 0x7524a000 : 0xf524a000) | (thislli / 2);
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dataptr += thislli;
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i++;
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}
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if (!pcm_remaining)
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{
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memcpy(dblbuf[active_dblbuf], dataptr, lastsize);
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lastlli->srcaddr = dblbuf[active_dblbuf];
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active_dblbuf ^= 1;
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}
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else lastlli->srcaddr = dataptr;
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lastlli->dstaddr = (void*)((int)&I2STXDB0);
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lastlli->nextlli = last ? NULL : pcm_lli;
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lastlli->control = (last ? 0xf524a000 : 0x7524a000) | (lastsize / 2);
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dataptr += lastsize;
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commit_dcache();
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if (!(DMAC0C0CONFIG & 1) && (pcm_lli[0].control & 0xfff))
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{
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DMAC0C0LLI = pcm_lli[0];
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DMAC0C0CONFIG = 0x8a81;
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}
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else DMAC0C0NEXTLLI = pcm_lli;
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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void pcm_play_dma_start(const void* addr, size_t size)
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{
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dataptr = addr;
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pcm_remaining = size;
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I2STXCOM = 0xe;
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INT_DMAC0C0();
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}
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void pcm_play_dma_stop(void)
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{
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DMAC0C0CONFIG = 0x8a80;
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I2STXCOM = 0xa;
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}
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/* pause playback by disabling LRCK */
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void pcm_play_dma_pause(bool pause)
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{
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if (pause) I2STXCOM |= 1;
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else I2STXCOM &= ~1;
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}
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/* MCLK = 12MHz (MCLKDIV2=1), [CS42L55 DS, s4.8] */
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#define MCLK_FREQ 12000000
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/* set the configured PCM frequency */
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void pcm_dma_apply_settings(void)
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{
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static uint16_t last_clkcon3l = 0;
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uint16_t clkcon3l;
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int fsel;
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/* For unknown reasons, s5l8702 I2S controller does not synchronize
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* with CS42L55 at 32000 Hz. To fix it, the CODEC is configured with
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* a sample rate of 48000 Hz and MCLK is decreased 1/3 to 8 Mhz,
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* obtaining 32 KHz in LRCK controller input and 8 MHz in SCLK input.
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* OF uses this trick.
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*/
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if (pcm_fsel == HW_FREQ_32) {
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fsel = HW_FREQ_48;
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clkcon3l = 0x3028; /* PLL2 / 3 / 9 -> 8 MHz */
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}
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else {
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fsel = pcm_fsel;
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clkcon3l = 0; /* OSC0 -> 12 MHz */
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}
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/* configure MCLK */
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/* TODO: maybe all CLKCON management should be moved to
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cscodec-ipod6g.c and system-s5l8702.c */
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if (last_clkcon3l != clkcon3l) {
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CLKCON3 = (CLKCON3 & ~0xffff) | 0x8000 | clkcon3l;
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udelay(100);
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CLKCON3 &= ~0x8000; /* CLKCON3L on */
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last_clkcon3l = clkcon3l;
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}
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/* configure I2S clock ratio */
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I2SCLKDIV = MCLK_FREQ / hw_freq_sampr[fsel];
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/* select CS42L55 sample rate */
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audiohw_set_frequency(fsel);
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}
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void pcm_play_dma_init(void)
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{
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PWRCON(0) &= ~(1 << 4);
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PWRCON(1) &= ~(1 << 7);
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I2STXCON = 0xb100019;
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I2SCLKCON = 1;
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VIC0INTENABLE = 1 << IRQ_DMAC0;
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audiohw_preinit();
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pcm_dma_apply_settings();
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}
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void pcm_play_dma_postinit(void)
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{
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audiohw_postinit();
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}
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size_t pcm_get_bytes_waiting(void)
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{
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int bytes = pcm_remaining;
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const struct dma_lli* lli = (const struct dma_lli*)((int)&DMAC0C0LLI);
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while (lli)
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{
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bytes += (lli->control & 0xfff) * 2;
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if (lli == lastlli) break;
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lli = lli->nextlli;
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}
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return bytes;
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}
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const void* pcm_play_dma_get_peak_buffer(int *count)
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{
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*count = (DMAC0C0LLI.control & 0xfff) * 2;
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return (void*)(((uint32_t)DMAC0C0LLI.srcaddr) & ~3);
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}
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#ifdef HAVE_PCM_DMA_ADDRESS
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void * pcm_dma_addr(void *addr)
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{
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return addr;
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}
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#endif
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/****************************************************************************
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** Recording DMA transfer
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**/
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#ifdef HAVE_RECORDING
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void pcm_rec_lock(void)
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{
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}
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void pcm_rec_unlock(void)
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{
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}
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void pcm_rec_dma_stop(void)
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{
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}
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void pcm_rec_dma_start(void *addr, size_t size)
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{
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(void)addr;
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(void)size;
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}
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void pcm_rec_dma_close(void)
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{
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}
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void pcm_rec_dma_init(void)
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{
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}
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const void * pcm_rec_dma_get_peak_buffer(void)
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{
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return NULL;
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}
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#endif /* HAVE_RECORDING */
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