85fd2d8be9
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26434 a1c6a512-1295-4272-9138-f99709370657
240 lines
7.2 KiB
ArmAsm
240 lines
7.2 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2004 by Jens Arnold
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* Based on the work of Alan Korr and Jörg Hohensohn
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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.section .icode,"ax",@progbits
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.align 2
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.global lcd_write_command
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.type lcd_write_command,@function
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lcd_write_command:
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move.l #~8, %d1
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and.l %d1, (MBAR2+0xb4)
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move.l (4, %sp), %d0
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move.w %d0, 0xf0000000
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rts
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.wc_end:
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.size lcd_write_command,.wc_end-lcd_write_command
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.align 2
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.global lcd_write_command_ex
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.type lcd_write_command_ex,@function
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lcd_write_command_ex:
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lea.l 0xf0000000, %a0
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lea.l MBAR2+0xb4, %a1
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move.l #~8, %d1 /* Set A0 = 0 */
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and.l %d1, (%a1)
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move.l (4, %sp), %d0 /* Command */
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move.w %d0, (%a0) /* Write to LCD */
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not.l %d1 /* Set A0 = 1 */
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or.l %d1, (%a1)
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move.l (8, %sp), %d0 /* Data */
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cmp.l #-1, %d0 /* -1? */
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beq.b .last
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move.w %d0, (%a0) /* Write to LCD */
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move.l (12, %sp), %d0 /* Data */
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cmp.l #-1, %d0 /* -1? */
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beq.b .last
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move.w %d0, (%a0) /* Write to LCD */
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.last:
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rts
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.wcex_end:
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.size lcd_write_command_ex,.wcex_end-lcd_write_command_ex
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.align 2
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.global lcd_write_data
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.type lcd_write_data,@function
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lcd_write_data:
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movem.l (4, %sp), %a0-%a1 /* Data pointer */
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move.l %a1, %d0 /* Length */
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moveq #8, %d1
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or.l %d1, (MBAR2+0xb4)
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lea.l 0xf0000000, %a1
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.loop:
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/* When running in IRAM, this loop takes 10 cycles plus the LCD write.
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The 10 cycles are necessary to follow the LCD timing specs
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at 140MHz */
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nop /* 3(0/0) */
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move.b (%a0)+, %d1 /* 3(1/0) */
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move.w %d1, (%a1) /* 1(0/1) */
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subq.l #1, %d0 /* 1(0/0) */
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bne .loop /* 2(0/0) */
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rts
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.wd_end:
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.size lcd_write_data,.wd_end-lcd_write_data
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.align 2
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.global lcd_grey_data
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.type lcd_grey_data,@function
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/* The main loop assumes the buffers are in SDRAM. Otherwise the LCD
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* controller timing won't be met at 124 MHz and graphical glitches
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* will occur. */
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lcd_grey_data:
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lea.l (-11*4, %sp), %sp
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movem.l %d2-%d7/%a2-%a6, (%sp) /* free some registers */
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movem.l (11*4+4, %sp), %a0-%a2 /* values, phases, length */
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lea.l (%a1, %a2.l*4), %a2 /* end address */
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moveq #8, %d1
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or.l %d1, (MBAR2+0xb4) /* A0 = 1 (data) */
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lea 0xf0000000, %a3 /* LCD data port */
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moveq.l #24, %d6 /* shift count */
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move.l #0xc30c3, %d7 /* bit shuffle factor */
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moveq.l #12, %d2
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add.l %a1, %d2
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and.l #0xfffffff0, %d2 /* first line bound */
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cmp.l %d2, %a2 /* end address lower than first line bound? */
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bhs.s 1f
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move.l %a2, %d2 /* -> adjust end address of head loop */
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1:
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cmp.l %a1, %d2
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bls.s .g_hend
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.g_hloop:
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move.l (%a1), %d0 /* fetch 4 pixel phases */
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move.l %d0, %d1
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and.l #0x80808080, %d1 /* separate MSBs of the 4 phases */
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eor.l %d1, %d0 /* clear them in %d0 */
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add.l (%a0)+, %d0 /* add 4 pixel values to the phases */
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move.l %d0, (%a1)+ /* store new phases, advance pointer */
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lsr.l #1, %d1 /* %d1 = .0.......1.......2.......3...... */
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mulu.l %d7, %d1 /* %d1 = 00112233112233..2233....33...... */
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not.l %d1 /* negate bits */
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lsr.l %d6, %d1 /* %d1 = ........................00112233 */
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move.w %d1, (%a3) /* write pixel block */
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cmp.l %a1, %d2 /* go up to first line bound */
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bhi.s .g_hloop
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.g_hend:
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cmp.l %a1, %a2
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bls.w .g_tend
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lea.l (-12, %a2), %a2
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cmp.l %a1, %a2
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bls.s .g_lend
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.g_lloop:
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movem.l (%a1), %d0-%d3 /* fetch 4 blocks of 4 pixel phases each */
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move.l %d0, %d4 /* calculate first pixel block */
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and.l #0x80808080, %d4
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eor.l %d4, %d0
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lsr.l #1, %d4
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mulu.l %d7, %d4
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not.l %d4
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lsr.l %d6, %d4
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move.w %d4, (%a3) /* write first pixel block to LCD */
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move.l %d1, %d5 /* calculate second pixel block */
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and.l #0x80808080, %d5
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eor.l %d5, %d1
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lsr.l #1, %d5
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mulu.l %d7, %d5
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not.l %d5
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lsr.l %d6, %d5
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move.l %d2, %d4 /* calculate third pixel block */
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and.l #0x80808080, %d4
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eor.l %d4, %d2
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lsr.l #1, %d4
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mulu.l %d7, %d4
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not.l %d4
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lsr.l %d6, %d4
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move.w %d5, (%a3) /* write second pixel block to LCD */
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movem.l (%a0), %d5/%a4-%a6 /* fetch 4 blocks of 4 pixel values each */
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lea.l (16, %a0), %a0
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move.w %d4, (%a3) /* write third pixel block to LCD */
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move.l %d3, %d4 /* calculate fourth pixel block */
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and.l #0x80808080, %d4
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eor.l %d4, %d3
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lsr.l #1, %d4
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mulu.l %d7, %d4
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not.l %d4
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lsr.l %d6, %d4
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add.l %d5, %d0 /* calculate 4*4 new pixel phases */
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add.l %a4, %d1 /* (packed addition) */
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add.l %a5, %d2
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add.l %a6, %d3
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movem.l %d0-%d3, (%a1) /* store 4*4 new pixel phases */
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lea.l (16, %a1), %a1
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move.w %d4, (%a3) /* write fourth pixel block to LCD */
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cmp.l %a1, %a2 /* go up to last line bound */
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bhi.s .g_lloop
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.g_lend:
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lea.l (12, %a2), %a2
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cmp.l %a1, %a2
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bls.s .g_tend
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.g_tloop:
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move.l (%a1), %d0 /* fetch 4 pixel phases */
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move.l %d0, %d1
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and.l #0x80808080, %d1
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eor.l %d1, %d0
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add.l (%a0)+, %d0 /* add 4 pixel values to the phases */
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move.l %d0, (%a1)+ /* store new phases, advance pointer */
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lsr.l #1, %d1
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mulu.l %d7, %d1
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not.l %d1
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lsr.l %d6, %d1
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move.w %d1, (%a3) /* write pixel block */
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cmp.l %a1, %a2 /* go up to end address */
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bhi.s .g_tloop
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.g_tend:
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movem.l (%sp), %d2-%d7/%a2-%a6 /* restore registers */
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lea.l (11*4, %sp), %sp
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rts
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.gd_end:
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.size lcd_grey_data,.gd_end-lcd_grey_data
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