Frank Gevaerts 7a2d9ddb08 move some data around to place qh_array at the start of iram. This saves up to about 2k iram on PP ... git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17194 a1c6a512-1295-4272-9138-f99709370657		2008-04-20 18:43:47 +00:00
..
h10	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
app.lds	move some data around to place qh_array at the start of iram. This saves up to about 2k iram on PP	2008-04-20 18:43:47 +00:00
backlight-target.h
boot.lds	Enable nocache sections using the linker. PP5022/4 must use SW_CORELOCK now with shared variables in DRAM (it seems swp(b) is at least partially broken on all PP or I'm doing something very wrong here :\). For core-shared data use SHAREDBSS/DATA_ATTR. NOCACHEBSS/DATA_ATTR is available whether or not single core is forced for static peripheral-DMA buffer allocation without use of the UNCACHED_ADDR macro in code and is likely useful on a non-PP target with a data cache (although not actually enabled in config.h and the .lds's in this commit).	2008-04-06 04:34:57 +00:00
usb-target.h