241 lines
8.2 KiB
C
241 lines
8.2 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "dma-imx233.h"
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#include "lcd.h"
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#include "string.h"
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// statistics about unaligned transfers
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static int apb_nr_unaligned[32];
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void imx233_dma_init(void)
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{
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/* Enable APHB and APBX */
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imx233_reset_block(&HW_APBH_CTRL0);
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imx233_reset_block(&HW_APBX_CTRL0);
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}
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void imx233_dma_reset_channel(unsigned chan)
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{
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uint32_t bm = 1 << APB_GET_DMA_CHANNEL(chan);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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BF_SETV(APBX_CHANNEL_CTRL, RESET_CHANNEL, bm);
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while(BF_RD(APBX_CHANNEL_CTRL, RESET_CHANNEL) & bm);
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}
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else
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{
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BF_SETV(APBH_CTRL0, RESET_CHANNEL, bm);
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while(BF_RD(APBH_CTRL0, RESET_CHANNEL) & bm);
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}
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}
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void imx233_dma_clkgate_channel(unsigned chan, bool enable_clock)
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{
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if(APB_IS_APBX_CHANNEL(chan))
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return;
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if(enable_clock)
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BF_CLRV(APBH_CTRL0, CLKGATE_CHANNEL, 1 << APB_GET_DMA_CHANNEL(chan));
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else
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BF_SETV(APBH_CTRL0, CLKGATE_CHANNEL, 1 << APB_GET_DMA_CHANNEL(chan));
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}
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void imx233_dma_freeze_channel(unsigned chan, bool freeze)
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{
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uint32_t bm = 1 << APB_GET_DMA_CHANNEL(chan);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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if(freeze)
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BF_SETV(APBX_CHANNEL_CTRL, FREEZE_CHANNEL, bm);
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else
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BF_CLRV(APBX_CHANNEL_CTRL, FREEZE_CHANNEL, bm);
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}
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else
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{
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if(freeze)
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BF_SETV(APBH_CTRL0, FREEZE_CHANNEL, bm);
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else
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BF_CLRV(APBH_CTRL0, FREEZE_CHANNEL, bm);
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}
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}
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void imx233_dma_enable_channel_interrupt(unsigned chan, bool enable)
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{
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uint32_t bm = 1 << APB_GET_DMA_CHANNEL(chan);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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if(enable)
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BF_SETV(APBX_CTRL1, CH_CMDCMPLT_IRQ_EN, bm);
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else
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BF_CLRV(APBX_CTRL1, CH_CMDCMPLT_IRQ_EN, bm);
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}
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else
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{
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if(enable)
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BF_SETV(APBH_CTRL1, CH_CMDCMPLT_IRQ_EN, bm);
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else
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BF_CLRV(APBH_CTRL1, CH_CMDCMPLT_IRQ_EN, bm);
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}
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imx233_dma_clear_channel_interrupt(chan);
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}
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void imx233_dma_clear_channel_interrupt(unsigned chan)
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{
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uint32_t bm = 1 << APB_GET_DMA_CHANNEL(chan);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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BF_CLRV(APBX_CTRL1, CH_CMDCMPLT_IRQ, bm);
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BF_CLRV(APBX_CTRL2, CH_ERROR_IRQ, bm);
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}
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else
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{
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BF_CLRV(APBH_CTRL1, CH_CMDCMPLT_IRQ, bm);
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BF_CLRV(APBH_CTRL2, CH_ERROR_IRQ, bm);
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}
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}
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bool imx233_dma_is_channel_error_irq(unsigned chan)
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{
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uint32_t bm = 1 << APB_GET_DMA_CHANNEL(chan);
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if(APB_IS_APBX_CHANNEL(chan))
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return !!(BF_RD(APBX_CTRL2, CH_ERROR_IRQ) & bm);
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else
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return !!(BF_RD(APBH_CTRL2, CH_ERROR_IRQ) & bm);
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}
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/* Commit and/or discard all DMA descriptors and buffers pointed by them,
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* handle circular lists. At the same time, convert virtual pointers to
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* real ones */
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static void imx233_dma_commit_and_discard(unsigned chan, struct apb_dma_command_t *cmd)
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{
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/* We handle circular descriptors by using unused bits:
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* bits 8-11 are not used by the hardware so we first go through the whole
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* list and mark them all a special value at the same time we commit buffers
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* and then we go through the list another time to clear the mark and
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* commit the descriptors */
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struct apb_dma_command_t *cur = cmd;
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while(BF_RDX(cur->cmd, APB_CHx_CMD, UNUSED) != BV_APB_CHx_CMD_UNUSED__MAGIC)
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{
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BF_WR_VX(cur->cmd, APB_CHx_CMD, UNUSED, MAGIC);
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int op = BF_RDX(cur->cmd, APB_CHx_CMD, COMMAND);
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int sz = BF_RDX(cur->cmd, APB_CHx_CMD, XFER_COUNT);
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/* device > host: discard */
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if(op == BV_APB_CHx_CMD_COMMAND__WRITE)
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discard_dcache_range(cur->buffer, sz);
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/* host > device: commit and discard */
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else if(op == BV_APB_CHx_CMD_COMMAND__READ)
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commit_discard_dcache_range(cur->buffer, sz);
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if((uint32_t)cur->buffer % CACHEALIGN_SIZE)
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apb_nr_unaligned[chan]++;
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/* Virtual to physical buffer pointer conversion */
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cur->buffer = PHYSICAL_ADDR(cur->buffer);
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/* chain ? */
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if(cur->cmd & BM_APB_CHx_CMD_CHAIN)
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cur = cur->next;
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else
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break;
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}
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cur = cmd;
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while(BF_RDX(cur->cmd, APB_CHx, CMD_UNUSED) != 0)
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{
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BF_WRX(cur->cmd, APB_CHx, CMD_UNUSED, 0);
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int sz = BF_RDX(cur->cmd, APB_CHx_CMD, CMDWORDS) * sizeof(uint32_t);
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/* commit descriptor and discard descriptor */
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/* chain ? */
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if(cur->cmd & BM_APB_CHx_CMD_CHAIN)
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{
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struct apb_dma_command_t *next = cur->next;
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cur->next = PHYSICAL_ADDR(cur->next);
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commit_dcache_range(cur, sizeof(struct apb_dma_command_t) + sz);
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cur = next;
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}
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else
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{
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commit_dcache_range(cur, sizeof(struct apb_dma_command_t) + sz);
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break;
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}
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}
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}
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void imx233_dma_start_command(unsigned chan, struct apb_dma_command_t *cmd)
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{
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imx233_dma_commit_and_discard(chan, cmd);
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if(APB_IS_APBX_CHANNEL(chan))
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{
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HW_APBX_CHn_NXTCMDAR(APB_GET_DMA_CHANNEL(chan)) = (uint32_t)PHYSICAL_ADDR(cmd);
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HW_APBX_CHn_SEMA(APB_GET_DMA_CHANNEL(chan)) = 1;
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}
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else
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{
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HW_APBH_CHn_NXTCMDAR(APB_GET_DMA_CHANNEL(chan)) = (uint32_t)PHYSICAL_ADDR(cmd);
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HW_APBH_CHn_SEMA(APB_GET_DMA_CHANNEL(chan)) = 1;
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}
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}
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int imx233_dma_wait_completion(unsigned chan, unsigned tmo)
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{
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tmo += current_tick;
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int value = 0;
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if(APB_IS_APBX_CHANNEL(chan))
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while((value = BF_RDn(APBX_CHn_SEMA, APB_GET_DMA_CHANNEL(chan), PHORE)) && !TIME_AFTER(current_tick, tmo))
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yield();
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else
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while((value = BF_RDn(APBH_CHn_SEMA, APB_GET_DMA_CHANNEL(chan), PHORE)) && !TIME_AFTER(current_tick, tmo))
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yield();
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return value;
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}
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struct imx233_dma_info_t imx233_dma_get_info(unsigned chan, unsigned flags)
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{
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struct imx233_dma_info_t s;
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memset(&s, 0, sizeof(s));
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bool apbx = APB_IS_APBX_CHANNEL(chan);
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int dmac = APB_GET_DMA_CHANNEL(chan);
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uint32_t bm = 1 << dmac;
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if(flags & DMA_INFO_CURCMDADDR)
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s.cur_cmd_addr = apbx ? HW_APBX_CHn_CURCMDAR(dmac) : HW_APBH_CHn_CURCMDAR(dmac);
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if(flags & DMA_INFO_NXTCMDADDR)
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s.nxt_cmd_addr = apbx ? HW_APBX_CHn_NXTCMDAR(dmac) : HW_APBH_CHn_NXTCMDAR(dmac);
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if(flags & DMA_INFO_CMD)
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s.cmd = apbx ? HW_APBX_CHn_CMD(dmac) : HW_APBH_CHn_CMD(dmac);
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if(flags & DMA_INFO_BAR)
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s.bar = apbx ? HW_APBX_CHn_BAR(dmac) : HW_APBH_CHn_BAR(dmac);
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if(flags & DMA_INFO_AHB_BYTES)
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s.ahb_bytes = apbx ? BF_RDn(APBX_CHn_DEBUG2, dmac, AHB_BYTES) : BF_RDn(APBH_CHn_DEBUG2, dmac, AHB_BYTES);
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if(flags & DMA_INFO_APB_BYTES)
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s.apb_bytes = apbx ? BF_RDn(APBX_CHn_DEBUG2, dmac, APB_BYTES) : BF_RDn(APBH_CHn_DEBUG2, dmac, APB_BYTES);
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if(flags & DMA_INFO_FREEZED)
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s.freezed = !!((apbx ? BF_RD(APBX_CHANNEL_CTRL, FREEZE_CHANNEL) : BF_RD(APBH_CTRL0, FREEZE_CHANNEL)) & bm);
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if(flags & DMA_INFO_GATED)
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s.gated = apbx ? false : !!(BF_RD(APBH_CTRL0, CLKGATE_CHANNEL) & bm);
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if(flags & DMA_INFO_INTERRUPT)
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{
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s.int_enabled = !!((apbx ? BF_RD(APBX_CTRL1, CH_CMDCMPLT_IRQ_EN) : BF_RD(APBH_CTRL1, CH_CMDCMPLT_IRQ_EN)) & bm);
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s.int_cmdcomplt = !!((apbx ? BF_RD(APBX_CTRL1, CH_CMDCMPLT_IRQ) : BF_RD(APBH_CTRL1, CH_CMDCMPLT_IRQ)) & bm);
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s.int_error = !!((apbx ? BF_RD(APBX_CTRL2, CH_ERROR_IRQ) : BF_RD(APBH_CTRL2, CH_ERROR_IRQ)) & bm);
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}
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s.nr_unaligned = apb_nr_unaligned[chan];
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return s;
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}
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