84134f737f
Use DMA engine for fullscreen updates and bypass mode for partial
updates. This gives major boost on rk27generic:
default ARM:AHB:APB 200💯50
HEAD 1/1: 26.3fps 1/4: 105.0fps
patched 1/1: 116.5fps 1/4: 249.5fps
with freq scalling NORMAL mode ARM:AHB:APB 50:50:50
HEAD 1/1: 13.1fps 1/4: 52.5fps
patched 1/1: 54.5fps 1/4: 119.0fps
Tested on rk27generic noname DAP and on Hifimans.
Change-Id: Id9dd4d2d61542c7ea6b5c6336b170d6357cefde9
267 lines
7.1 KiB
C
267 lines
7.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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*
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* Copyright (C) 2011 Marcin Bukat
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* Copyright (C) 2012 Andrew Ryabinin
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "kernel.h"
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#include "lcd.h"
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#include "system.h"
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#include "cpu.h"
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#include "lcdif-rk27xx.h"
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#include "lcd-target.h"
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#include <string.h>
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/* dwdma linked list struct - hw defined
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* we don't use __attribute__((packed)) just because
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* all fields are 32bits and so are aligned
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*/
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struct llp_t {
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uint32_t sar;
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uint32_t dar;
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struct llp_t *llp;
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uint32_t ctl_l;
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uint32_t ctl_h;
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uint32_t dstat;
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};
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/* array of structs which describes full screen update
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* each struct describes dma transfer for single line
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*/
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static struct llp_t scr_llp[LCD_HEIGHT];
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static uint32_t lcd_data_transform(uint32_t data)
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{
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unsigned int r, g, b;
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#if defined(RK27_GENERIC)
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/* 18 bit interface */
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r = (data & 0x0000fc00)<<8;
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/* g = ((data & 0x00000300) >> 2) | ((data & 0x000000e0) >> 3); */
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g = ((data & 0x00000300) << 6) | ((data & 0x000000e0) << 5);
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b = (data & 0x00000001f) << 3;
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#elif defined(HM60X) || defined(HM801)
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/* 16 bit interface */
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r = (data & 0x0000f800) << 8;
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g = (data & 0x000007e0) << 5;
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b = (data & 0x0000001f) << 3;
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#else
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#error "Unknown target"
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#endif
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return (r | g | b);
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}
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static void lcdctrl_init(void)
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{
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int i;
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/* alpha b111
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* stop at current frame complete
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* MCU mode
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* 24b RGB
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*/
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LCDC_CTRL = ALPHA(7) | LCDC_STOP | LCDC_MCU | RGB24B;
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MCU_CTRL = ALPHA_BASE(0x3f) | MCU_CTRL_BYPASS;
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/* Warning: datasheet addresses and OF addresses
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* don't match for HOR_ACT and VERT_ACT
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*/
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HOR_ACT = LCD_WIDTH + 3; /* define horizonatal active region */
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VERT_ACT = LCD_HEIGHT; /* define vertical active region */
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VERT_PERIOD = (1<<7)|(1<<5)|1; /* CSn/WEn/RDn signal timings */
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lcd_display_init();
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lcdctrl_bypass(0);
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/* This lines define layout of data in lcdif internal buffer
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* LINEx_UVADDR = LINEx_YADDR + 1
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* buffer is organized as 2048 x 32bit
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* we use RGB565 (16 bits per pixel) so we pack 2 pixels
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* in every lcdbuffer mem cell
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*/
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LINE0_YADDR = 0;
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LINE1_YADDR = 1 * LCD_WIDTH/2;
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LINE2_YADDR = 2 * LCD_WIDTH/2;
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LINE3_YADDR = 3 * LCD_WIDTH/2;
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LINE0_UVADDR = 1;
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LINE1_UVADDR = (1 * LCD_WIDTH/2) + 1;
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LINE2_UVADDR = (2 * LCD_WIDTH/2) + 1;
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LINE3_UVADDR = (3 * LCD_WIDTH/2) + 1;
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LCDC_INTR_MASK = INTR_MASK_EVENLINE;
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/* This loop seems to fix strange glitch where
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* whole lcd content was shifted ~4 lines verticaly
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* on second lcd_update call
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*/
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for (i=0; i<2048; i++)
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*((uint32_t *)LCD_BUFF + i) = 0;
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/* Setup buffered writes to lcd controler */
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MCU_CTRL = MCU_CTRL_RS_HIGH|MCU_CTRL_BUFF_WRITE|MCU_CTRL_BUFF_START;
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}
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/* configure pins to drive lcd in 18bit mode (16bit mode for HiFiMAN's) */
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static void iomux_lcd(enum lcdif_mode_t mode)
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{
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unsigned long muxa;
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muxa = SCU_IOMUXA_CON & ~(IOMUX_LCD_VSYNC|IOMUX_LCD_DEN|0xff);
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if (mode == LCDIF_18BIT)
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{
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muxa |= IOMUX_LCD_D18|IOMUX_LCD_D20|IOMUX_LCD_D22|IOMUX_LCD_D17|IOMUX_LCD_D16;
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}
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SCU_IOMUXA_CON = muxa;
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SCU_IOMUXB_CON |= IOMUX_LCD_D815;
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}
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static void dwdma_init(void)
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{
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DWDMA_DMA_CHEN = 0xf00;
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DWDMA_CLEAR_BLOCK = 0x0f;
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DWDMA_DMA_CFG = 1; /* global enable */
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}
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static void llp_setup(void *src, void *dst, struct llp_t *llp, uint32_t size)
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{
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llp->sar = (uint32_t)src;
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llp->dar = (uint32_t)dst;
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llp->llp = llp + 1;
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llp->ctl_h = size;
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llp->ctl_l = (1<<20) |
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(1<<23) |
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(1<<17) |
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(2<<1) |
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(2<<4) |
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(3<<11) |
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(3<<14) |
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(1<<27) |
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(1<<28) ;
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}
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static void llp_end(struct llp_t *llp)
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{
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llp->ctl_l &= ~((1<<27)|(1<<28));
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}
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static void dwdma_start(uint8_t ch, struct llp_t *llp, uint8_t handshake)
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{
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DWDMA_SAR(ch) = 0;
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DWDMA_DAR(ch) = 0;
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DWDMA_LLP(ch) = (uint32_t)llp;
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DWDMA_CTL_L(ch) = (1<<20) |
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(1<<23) |
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(1<<17) |
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(2<<1) |
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(2<<4) |
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(3<<11) |
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(3<<14) |
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(1<<27) |
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(1<<28) ;
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DWDMA_CTL_H(ch) = 1;
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DWDMA_CFG_L(ch) = (7<<5);
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DWDMA_CFG_H(ch) = (handshake<<11)|(1<<2);
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DWDMA_SGR(ch) = (13<<20);
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DWDMA_DMA_CHEN = (0x101<<ch);
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}
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static void create_llp(void)
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{
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int i;
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/* build LLPs */
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for (i=0; i<LCD_HEIGHT; i++)
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llp_setup((void *)FBADDR(0,i),
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(void*)(LCD_BUFF+((i%4)*4*LCD_WIDTH/2)),
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&(scr_llp[i]),
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LCD_WIDTH/2);
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llp_end(&scr_llp[LCD_HEIGHT-1]);
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}
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/* Public functions */
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/* Switch between lcdif bypass mode and buffered mode
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* used in private implementations of lcd_set_gram_area()
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*/
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void lcdctrl_bypass(unsigned int on_off)
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{
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while (!(LCDC_STA & LCDC_MCU_IDLE));
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if (on_off)
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MCU_CTRL |= MCU_CTRL_BYPASS;
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else
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MCU_CTRL &= ~MCU_CTRL_BYPASS;
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}
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/* Helper functions used to write commands
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* to lcd controler in bypass mode
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* used in controler specific implementations of:
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* lcd_sleep()
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* lcd_display_init()
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*/
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void lcd_cmd(unsigned int cmd)
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{
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LCD_COMMAND = lcd_data_transform(cmd);
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}
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void lcd_data(unsigned int data)
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{
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LCD_DATA = lcd_data_transform(data);
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}
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void lcd_write_reg(unsigned int reg, unsigned int val)
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{
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lcd_cmd(reg);
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lcd_data(val);
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}
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/* rockbox API functions */
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void lcd_init_device(void)
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{
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iomux_lcd(LCD_DATABUS_WIDTH); /* setup pins for lcd interface */
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dwdma_init(); /* init dwdma module */
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create_llp(); /* build LLPs for screen update dma */
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lcdctrl_init(); /* basic lcdc module configuration */
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}
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void lcd_update()
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{
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lcd_set_gram_area(0, 0, LCD_WIDTH, LCD_HEIGHT);
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lcdctrl_bypass(0);
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commit_discard_dcache_range(FBADDR(0,0), 2*LCD_WIDTH*LCD_HEIGHT);
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while (!(LCDC_STA & LCDC_MCU_IDLE));
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dwdma_start(0, scr_llp, 6);
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udelay(10);
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/* Setup buffered writes to lcd controler */
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MCU_CTRL = MCU_CTRL_RS_HIGH|MCU_CTRL_BUFF_WRITE|MCU_CTRL_BUFF_START;
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/* Wait for DMA transfer to finish */
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while (DWDMA_CTL_L(0) & (1<<27));
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}
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