e61e9c61d0
* SOUND_x enum can be generated by audiohw_settings.h along with settings entries and sound_val2phys. * VOLUME_MIN and VOLUME_MAX are no longer necessary within sound.c. If you need them, they are for target-defined purposes. * Fix up SDL volume implementation in sdl.c. Move sim volume calculation code to pcm-sdl.c. * Min trigger tresholds were based upon VOLUME_MIN for some reason. These setting have nothing to do with playback volume. Since it is no longer present, set these at -89dB which is the minimum peak meter sensitivity setting. * Fix an oversight in wm8758.c. I forgot to add the dB->register conversion to audiohw_set_volume. Change-Id: Ie1df33f1793eee75e6793f16bc7bddd16edb7f75
188 lines
6.6 KiB
C
188 lines
6.6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2005 by Dave Chapman
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*
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* Header file for WM8711/WM8721/WM8731 codecs.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef _WM8731_H
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#define _WM8731_H
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#define AUDIOHW_CAPS (LIN_GAIN_CAP | MIC_GAIN_CAP)
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AUDIOHW_SETTING(VOLUME, "dB", 0, 1, -74, 6, -25)
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#if defined(HAVE_WM8731) && defined(HAVE_RECORDING)
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/* (x - 23)/1.5 *10 */
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AUDIOHW_SETTING(LEFT_GAIN, "dB", 1, 1, 0, 31, 23, (val - 23) * 15)
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AUDIOHW_SETTING(RIGHT_GAIN, "dB", 1, 1, 0, 31, 23, (val - 23) * 15)
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/* 0 or 20 dB */
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AUDIOHW_SETTING(MIC_GAIN, "dB", 1, 1, 0, 1, 0, val * 200)
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#endif /* defined(HAVE_WM8731) && defined(HAVE_RECORDING) */
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/* Common register bits */
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#ifdef HAVE_WM8731
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#define WMC_IN_VOL_MASK 0x1f
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#define WMC_IN_VOL(x) ((x) & WMC_IN_VOL_MASK)
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#define WMC_IN_MUTE (1 << 7)
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#endif /* WM8731 */
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#define WMC_OUT_VOL_MASK 0x7f
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#define WMC_OUT_VOL(x) ((x) & WMC_OUT_VOL_MASK)
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#define WMC_OUT_ZCEN (1 << 7)
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#define WMC_BOTH (1 << 8)
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/* Register addresses and bits */
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#ifdef HAVE_WM8731
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#define LINVOL 0x00
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#define LINVOL_DEFAULT 0x79
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/* Use IN common bits */
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#define RINVOL 0x01
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#define RINVOL_DEFAULT 0x79
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/* Use IN common bits */
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#endif /* WM8731 */
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#define LOUTVOL 0x02
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#define LOUTVOL_DEFAULT 0x079
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/* Use OUT common bits */
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#define ROUTVOL 0x03
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#define ROUTVOL_DEFAULT 0x079
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/* Use OUT common bits */
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#define AAPCTRL 0x04 /* Analog audio path control */
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#define AAPCTRL_DACSEL (1 << 4)
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#if defined(HAVE_WM8711)
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#define AAPCTRL_DEFAULT 0x008 /* BYPASS enabled */
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#define AAPCTRL_BYPASS (1 << 3)
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#elif defined(HAVE_WM8721)
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#define AAPCTRL_DEFAULT 0x000
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#elif defined(HAVE_WM8731)
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#define AAPCTRL_DEFAULT 0x00a /* BYPASS enabled, MUTEMIC */
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#define AAPCTRL_MIC_BOOST (1 << 0)
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#define AAPCTRL_MUTEMIC (1 << 1)
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#define AAPCTRL_INSEL (1 << 2)
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#define AAPCTRL_BYPASS (1 << 3)
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#define AAPCTRL_SIDETONE (1 << 5)
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#define AAPCTRL_SIDEATT_MASK (3 << 6)
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#define AAPCTRL_SIDEATT_6dB (0 << 6)
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#define AAPCTRL_SIDEATT_9dB (1 << 6)
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#define AAPCTRL_SIDEATT_12dB (2 << 6)
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#define AAPCTRL_SIDEATT_15dB (3 << 6)
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#endif /* WM87x1 */
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#define DAPCTRL 0x05 /* Digital audio path control */
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#define DAPCTRL_DEFAULT 0x008
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#define DAPCTRL_DEEMP_DISABLE (0 << 1)
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#define DAPCTRL_DEEMP_32KHz (1 << 1)
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#define DAPCTRL_DEEMP_44KHz (2 << 1)
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#define DAPCTRL_DEEMP_48KHz (3 << 1)
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#define DAPCTRL_DEEMP_MASK (3 << 1)
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#define DAPCTRL_DACMU (1 << 3)
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#if defined(HAVE_WM8731)
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#define DAPCTRL_ADCHPD (1 << 0)
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#define DAPCTRL_HPOR (1 << 4)
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#endif /* WM8731 */
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#define PDCTRL 0x06
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#define PDCTRL_DACPD (1 << 3)
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#define PDCTRL_OUTPD (1 << 4)
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#define PDCTRL_POWEROFF (1 << 7)
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#if defined(HAVE_WM8711)
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#define PDCTRL_DEFAULT 0x09f /* CLKPD, OSCPD not off */
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#define PDCTRL_OSCPD (1 << 5)
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#define PDCTRL_CLKOUTPD (1 << 6)
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/* These bits should always be '1' */
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#define PDCTRL_ALWAYS_SET 0x007
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#elif defined(HAVE_WM8721)
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#define PDCTRL_DEFAULT 0x0ff
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/* These bits should always be '1' */
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#define PDCTRL_ALWAYS_SET 0x067
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#elif defined(HAVE_WM8731)
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#define PDCTRL_DEFAULT 0x09f /* CLKPD, OSCPD not off */
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#define PDCTRL_LINEINPD (1 << 0)
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#define PDCTRL_MICPD (1 << 1)
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#define PDCTRL_ADCPD (1 << 2)
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#define PDCTRL_OSCPD (1 << 5)
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#define PDCTRL_CLKOUTPD (1 << 6)
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/* These bits should always be '1' */
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#define PDCTRL_ALWAYS_SET 0x000
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#endif
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#define AINTFCE 0x07
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#define AINTFCE_DEFAULT 0x00a
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#define AINTFCE_FORMAT_MSB_RJUST (0 << 0)
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#define AINTFCE_FORMAT_MSB_LJUST (1 << 0)
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#define AINTFCE_FORMAT_I2S (2 << 0)
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#define AINTFCE_FORMAT_DSP (3 << 0)
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#define AINTFCE_FORMAT_MASK (3 << 0)
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#define AINTFCE_IWL_16BIT (0 << 2)
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#define AINTFCE_IWL_20BIT (1 << 2)
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#define AINTFCE_IWL_24BIT (2 << 2)
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#define AINTFCE_IWL_32BIT (3 << 2)
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#define AINTFCE_IWL_MASK (3 << 2)
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#define AINTFCE_LRP_I2S_RLO (0 << 4)
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#define AINTFCE_LRP_I2S_RHI (1 << 4)
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#define AINTFCE_DSP_MODE_B (0 << 4)
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#define AINTFCE_DSP_MODE_A (1 << 4)
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#define AINTFCE_LRSWAP (1 << 5)
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#define AINTFCE_MS (1 << 6)
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#define AINTFCE_BCLKINV (1 << 7)
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#define SAMPCTRL 0x08
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#define SAMPCTRL_DEFAULT 0x000
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#define SAMPCTRL_USB (1 << 0)
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/* For 88.2, 96 */
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#define SAMPCTRL_BOSR_NOR_128fs (0 << 1)
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#define SAMPCTRL_BOSR_NOR_192fs (1 << 1)
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/* */
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#define SAMPCTRL_BOSR_NOR_256fs (0 << 1)
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#define SAMPCTRL_BOSR_NOR_384fs (1 << 1)
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#define SAMPCTRL_BOSR_USB_250fs (0 << 1)
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#define SAMPCTRL_BOSR_USB_272fs (1 << 1)
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/* Bits 2-5:
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* Sample rate setting are device-specific.
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* See WM8711/WM8721/WM8731 datasheet for proper settings for the
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* device's clocking */
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#define SAMPCTRL_SR_MASK (0xf << 2)
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#define SAMPCTRL_CLKIDIV2 (1 << 6)
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#if defined(HAVE_WM8711) || defined(HAVE_WM8731)
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#define SAMPCTRL_CLKODIV2 (1 << 7)
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#endif
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#define ACTIVECTRL 0x09
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#define ACTIVECTRL_DEFAULT 0x000
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#define ACTIVECTRL_ACTIVE (1 << 0)
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#define RESET 0x0f
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/* No reset default */
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#define RESET_RESET 0x000
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#define WMC_NUM_REGS 0x0a /* RESET not included */
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/* SAMPCTRL values for the supported samplerates (24MHz MCLK/USB): */
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#define WMC_USB24_8000HZ 0x4d
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#define WMC_USB24_32000HZ 0x59
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#define WMC_USB24_44100HZ 0x63
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#define WMC_USB24_48000HZ 0x41
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#define WMC_USB24_88200HZ 0x7f
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#define WMC_USB24_96000HZ 0x5d
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#endif /* _WM8731_H */
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