5e058e0bfe
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20119 a1c6a512-1295-4272-9138-f99709370657
313 lines
8.7 KiB
C
313 lines
8.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2007 Catalin Patulea <cat@vv.carleton.ca>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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#include "system.h"
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#include "debug.h"
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#include "string.h"
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#include "file.h"
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#include "dsp-target.h"
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#include "dsp/ipc.h"
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/* A "DSP image" is an array of these, terminated by raw_data_size_half = 0. */
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struct dsp_section {
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const unsigned short *raw_data;
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unsigned short physical_addr;
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unsigned short raw_data_size_half;
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};
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/* Must define struct dsp_section before including the image. */
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#include "dsp/dsp-image.h"
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#define dsp_message (*(volatile struct ipc_message *)&DSP_(_status))
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#ifdef DEBUG
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static void dsp_status(void)
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{
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unsigned short hpib_ctl = IO_DSPC_HPIB_CONTROL;
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unsigned short hpib_stat = IO_DSPC_HPIB_STATUS;
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char buffer1[80], buffer2[80];
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DEBUGF("dsp_status(): clkc_hpib=%u clkc_dsp=%u",
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!!(IO_CLK_MOD0 & (1 << 11)), !!(IO_CLK_MOD0 & (1 << 10)));
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DEBUGF("dsp_status(): irq_dsphint=%u 7fff=%04x scratch_status=%04x"
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" acked=%04x",
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(IO_INTC_IRQ0 >> IRQ_DSPHINT) & 1, DSP_(0x7fff), DSP_(_status),
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DSP_(_acked));
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#define B(f,w,b,m) if ((w & (1 << b)) == 0) \
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strcat(f, "!"); \
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strcat(f, #m "|");
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strcpy(buffer1, "");
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B(buffer1, hpib_ctl, 0, EN);
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B(buffer1, hpib_ctl, 3, NMI);
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B(buffer1, hpib_ctl, 5, EXCHG);
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B(buffer1, hpib_ctl, 7, DINT0);
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B(buffer1, hpib_ctl, 8, DRST);
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B(buffer1, hpib_ctl, 9, DHOLD);
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B(buffer1, hpib_ctl, 10, BIO);
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strcpy(buffer2, "");
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B(buffer2, hpib_stat, 8, HOLDA);
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B(buffer2, hpib_stat, 12, DXF);
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DEBUGF("dsp_status(): hpib: ctl=%s stat=%s", buffer1, buffer2);
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#undef B
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}
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#endif
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static void dsp_reset(void)
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{
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DSP_(0x7fff) = 0xdead;
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IO_DSPC_HPIB_CONTROL &= ~(1 << 8);
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/* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 8;
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/* TODO: Timeout. */
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while (DSP_(0x7fff) != 0);
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}
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void dsp_wake(void)
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{
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/* If this is called concurrently, we may overlap setting and resetting the
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bit, which causes lost interrupts to the DSP. */
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int old_level = disable_irq_save();
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/* The first time you INT0 the DSP, the ROM loader will branch to your RST
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handler. Subsequent times, your INT0 handler will get executed. */
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IO_DSPC_HPIB_CONTROL &= ~(1 << 7);
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nop; nop;
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IO_DSPC_HPIB_CONTROL |= 1 << 7;
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restore_irq(old_level);
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}
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static void dsp_load(const struct dsp_section *im)
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{
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while (im->raw_data_size_half) {
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volatile unsigned short *data_ptr = &DSP_(im->physical_addr);
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unsigned int i;
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/* Use 16-bit writes. */
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if (im->raw_data) {
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DEBUGF("dsp_load(): loading %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = im->raw_data[i];
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}
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} else {
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DEBUGF("dsp_load(): clearing %u words at 0x%04x (0x%08lx)",
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im->raw_data_size_half, im->physical_addr,
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(unsigned long)data_ptr);
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for (i = 0; i < im->raw_data_size_half; i++) {
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data_ptr[i] = 0;
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}
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}
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im++;
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}
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}
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static signed short *the_rover = (signed short *)0x1900000;
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static unsigned int index_rover = 0;
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static signed short __attribute__((aligned (16))) pcm_buffer[PCM_SIZE / 2];
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void dsp_init(void)
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{
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unsigned long sdem_addr;
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int fd;
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int bytes;
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IO_INTC_IRQ0 = 1 << 11;
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IO_INTC_EINT0 |= 1 << 11;
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IO_DSPC_HPIB_CONTROL = 1 << 10 | 1 << 9 | 1 << 8 | 1 << 7 | 1 << 3 | 1 << 0;
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dsp_reset();
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dsp_load(dsp_image);
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/* Initialize codec. */
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sdem_addr = (unsigned long)pcm_buffer - CONFIG_SDRAM_START;
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DEBUGF("pcm_sdram at 0x%08lx, sdem_addr 0x%08lx",
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(unsigned long)pcm_buffer, (unsigned long)sdem_addr);
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DSP_(_sdem_addrl) = sdem_addr & 0xffff;
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DSP_(_sdem_addrh) = sdem_addr >> 16;
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fd = open("/test.raw", O_RDONLY);
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bytes = read(fd, the_rover, 4*1024*1024);
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close(fd);
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DEBUGF("read %d rover bytes", bytes);
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#if 0
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{
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unsigned int i;
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memset(pcm_buffer, 0x80, PCM_SIZE);
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for (i = 0; i < 8192; i++) {
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signed short val = 0;
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/*if (i < PCM_SIZE/4/2) {
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val = 128*(i%256);
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} else {
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val = 2*128*128-128*(i%256);
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}*/
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val = 128*(i%256);
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pcm_buffer[2*i] = pcm_buffer[2*i+1] = val;
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}
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clean_dcache();
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{
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unsigned int i;
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volatile signed short *pdata = &DSP_(_data);
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DEBUGF("dsp__data at %08x", pdata);
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for (i = 0; i < 4096; i++) {
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pdata[2*i]=pdata[2*i+1]=(i&1)*32767;
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}
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for (i = 4096; i < 8192; i++) {
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pdata[2*i]=pdata[2*i+1]=0;
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}
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}
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#endif
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#ifdef IPC_SIZES
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DEBUGF("dsp_message at 0x%08x", &dsp_message);
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DEBUGF("sizeof(ipc_message)=%uB offset(ipc_message.payload)=%uB",
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sizeof(struct ipc_message), (int)&((struct ipc_message*)0)->payload);
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#endif
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#ifdef INIT_MSG
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/* Prepare init message. */
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/* DSP accesses MUST be done a word at a time. */
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dsp_message.msg = MSG_INIT;
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sdem_addr = (unsigned long)pcm_sdram - CONFIG_SDRAM_START;
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DEBUGF("pcm_sdram at 0x%08x, sdem_addr 0x%08x", pcm_sdram, sdem_addr);
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dsp_message.payload.init.sdem_addrl = sdem_addr & 0xffff;
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dsp_message.payload.init.sdem_addrh = sdem_addr >> 16;
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DEBUGF("dsp_message: %04x %04x %04x %04x",
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((unsigned short *)&dsp_message)[0],
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((unsigned short *)&dsp_message)[1],
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((unsigned short *)&dsp_message)[2],
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((unsigned short *)&dsp_message)[3]);
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#endif
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}
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void DSPHINT(void)
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{
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unsigned int i;
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char buffer[80];
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unsigned short *pcm_topbottom;
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IO_INTC_IRQ0 = 1 << 11;
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switch (dsp_message.msg)
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{
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case MSG_DEBUGF:
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/* DSP stores one character per word. */
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for (i = 0; i < sizeof(buffer); i++)
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{
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buffer[i] = dsp_message.payload.debugf.buffer[i];
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}
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/* Release shared area to DSP. */
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dsp_wake();
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DEBUGF("DSP: %s", buffer);
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break;
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case MSG_REFILL:
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DEBUGF("DSP: DMA0 with topbottom=%u (fill at %04lx)",
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dsp_message.payload.refill.topbottom,
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(unsigned long)pcm_buffer +
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dsp_message.payload.refill.topbottom);
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pcm_topbottom = pcm_buffer + dsp_message.payload.refill.topbottom / 2;
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/*
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i = 0;
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while (i < PCM_SIZE/4) {
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unsigned int j;
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for (j = 0; j < level; j++) {
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pcm_topbottom[i+j] = -32768;
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}
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for (j = level; j < 2*level; j++) {
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pcm_topbottom[i+j] = 32767;
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}
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i += 2*level;
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}
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level += 2;
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if (level > 256) {
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level = 2;
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}*/
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memcpy(pcm_topbottom, the_rover + index_rover, PCM_SIZE/2);
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index_rover += PCM_SIZE/4;
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if (index_rover >= 2*1024*1024) {
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index_rover = 0;
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}
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/*
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pcm_topbottom = &p_pcm_sdram[dsp_message.payload.refill.topbottom/2];
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DEBUGF("DSP: tofill begins: %04x %04x %04x %04x",
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pcm_topbottom[0],
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pcm_topbottom[1],
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pcm_topbottom[2],
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pcm_topbottom[3]
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);
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pcm_topbottom_end = &p_pcm_sdram[(dsp_message.payload.refill.topbottom+PCM_SIZE/2)/2];
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DEBUGF("DSP: tofill ends: %04x %04x %04x %04x",
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pcm_topbottom_end[-4],
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pcm_topbottom_end[-3],
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pcm_topbottom_end[-2],
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pcm_topbottom_end[-1]
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);
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*/
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/*
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DEBUGF("DSP: DMA0: SD %04x:%04x -> DSP %04x:%04x, TRG %04x",
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dsp_message.payload.refill._SDEM_ADDRH,
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dsp_message.payload.refill._SDEM_ADDRL,
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dsp_message.payload.refill._DSP_ADDRH,
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dsp_message.payload.refill._DSP_ADDRL,
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dsp_message.payload.refill._DMA_TRG);
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*/
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break;
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default:
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DEBUGF("DSP: unknown msg 0x%04x", dsp_message.msg);
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break;
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}
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/* Release shared area to DSP. */
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dsp_wake();
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DEBUGF("DSP: %s", buffer);
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}
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