eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
399 lines
13 KiB
C
399 lines
13 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (c) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "lcdif-imx233.h"
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#include "pinctrl-imx233.h"
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#include "icoll-imx233.h"
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#include "regs/lcdif.h"
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#if IMX233_SUBTARGET >= 3700
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static lcdif_irq_cb_t g_cur_frame_cb = NULL;
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static lcdif_irq_cb_t g_vsync_edge_cb = NULL;
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static lcdif_irq_cb_t g_underflow_cb = NULL;
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#endif
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/* for some crazy reason, all "non-dma" interrupts are routed to the ERROR irq */
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#if IMX233_SUBTARGET >= 3700
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void INT_LCDIF_ERROR(void)
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{
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if(BF_RD(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ))
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{
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if(g_cur_frame_cb)
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g_cur_frame_cb();
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BF_CLR(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ);
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}
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if(BF_RD(LCDIF_CTRL1, VSYNC_EDGE_IRQ))
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{
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if(g_vsync_edge_cb)
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g_vsync_edge_cb();
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BF_CLR(LCDIF_CTRL1, VSYNC_EDGE_IRQ);
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}
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if(BF_RD(LCDIF_CTRL1, UNDERFLOW_IRQ))
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{
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if(g_underflow_cb)
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g_underflow_cb();
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BF_CLR(LCDIF_CTRL1, UNDERFLOW_IRQ);
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}
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}
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#endif
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void imx233_lcdif_enable(bool enable)
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{
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if(enable)
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BF_CLR(LCDIF_CTRL, CLKGATE);
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else
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BF_SET(LCDIF_CTRL, CLKGATE);
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}
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void imx233_lcdif_reset_lcd(bool enable)
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{
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#if IMX233_SUBTARGET < 3700
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if(enable)
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BF_SET(LCDIF_CTRL, RESET);
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else
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BF_CLR(LCDIF_CTRL, RESET);
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#else
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if(enable)
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BF_SET(LCDIF_CTRL1, RESET);
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else
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BF_CLR(LCDIF_CTRL1, RESET);
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#endif
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}
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void imx233_lcdif_init(void)
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{
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imx233_reset_block(&HW_LCDIF_CTRL);
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#if IMX233_SUBTARGET >= 3700
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imx233_icoll_enable_interrupt(INT_SRC_LCDIF_ERROR, true);
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#endif
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}
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void imx233_lcdif_set_timings(unsigned data_setup, unsigned data_hold,
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unsigned cmd_setup, unsigned cmd_hold)
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{
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BF_WR_ALL(LCDIF_TIMING, DATA_SETUP(data_setup),
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DATA_HOLD(data_hold), CMD_SETUP(cmd_setup), CMD_HOLD(cmd_hold));
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}
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void imx233_lcdif_set_word_length(unsigned word_length)
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{
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switch(word_length)
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{
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case 8: BF_WR(LCDIF_CTRL, WORD_LENGTH_V(8_BIT)); break;
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case 16: BF_WR(LCDIF_CTRL, WORD_LENGTH_V(16_BIT)); break;
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#if IMX233_SUBTARGET >= 3780
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case 18: BF_WR(LCDIF_CTRL, WORD_LENGTH_V(18_BIT)); break;
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case 24: BF_WR(LCDIF_CTRL, WORD_LENGTH_V(24_BIT)); break;
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#endif
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default:
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panicf("this chip cannot handle a lcd word length of %d", word_length);
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break;
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}
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}
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void imx233_lcdif_wait_ready(void)
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{
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while(BF_RD(LCDIF_CTRL, RUN));
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}
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void imx233_lcdif_set_data_swizzle(unsigned swizzle)
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{
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#if IMX233_SUBTARGET >= 3780
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BF_WR(LCDIF_CTRL, INPUT_DATA_SWIZZLE(swizzle));
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#else
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BF_WR(LCDIF_CTRL, DATA_SWIZZLE(swizzle));
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#endif
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}
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void imx233_lcdif_wait_fifo(void)
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{
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#if IMX233_SUBTARGET >= 3700
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while(BF_RD(LCDIF_STAT, TXFIFO_FULL));
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#else
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while(!BF_RD(LCDIF_CTRL, FIFO_STATUS));
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#endif
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}
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/* The following function set byte packing often, ifdefing everytime is painful */
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#if IMX233_SUBTARGET < 3700
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#define imx233_lcdif_set_byte_packing_format(a)
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#endif
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// bbp = bytes per pixel
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static void pio_send(unsigned len, unsigned bpp, uint8_t *buf)
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{
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/* WARNING: the imx233 has a limitation on count wrt to byte packing, the
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* count must be a multiple of 2 with maximum packing when word-length is
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* 16-bit!
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* On the other hand, 8-bit word length doesn't seem to have any limitations,
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* for example one can send 3 bytes with a packing format of 0xf
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* WARNING for this function to work properly with any swizzle, we have to
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* make sure we pack as many 32-bits as possible even when the data is not
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* word-aligned */
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imx233_lcdif_set_byte_packing_format(0xf);
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/* compute shift between buf and next word-aligned pointer */
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int shift = 0;
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uint32_t temp_buf = 0;
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int count = len * bpp; // number of bytes
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while(0x3 & (intptr_t)buf)
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{
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temp_buf = temp_buf | *buf++ << shift;
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shift += 8;
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count--;
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}
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/* starting from now, all read are 32-bit */
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uint32_t *wbuf = (void *)buf;
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#if IMX233_SUBTARGET >= 3780
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BF_WR_ALL(LCDIF_TRANSFER_COUNT, V_COUNT(1), H_COUNT(len));
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#else
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BF_WR(LCDIF_CTRL, COUNT(len));
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#endif
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BF_SET(LCDIF_CTRL, RUN);
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while(count > 0)
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{
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uint32_t val = *wbuf++;
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imx233_lcdif_wait_fifo();
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HW_LCDIF_DATA = temp_buf | val << shift;
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if(shift != 0)
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temp_buf = val >> (32 - shift);
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count -= 4;
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}
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/* send remaining bytes if any */
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if(shift != 0)
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{
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imx233_lcdif_wait_fifo();
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HW_LCDIF_DATA = temp_buf;
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}
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imx233_lcdif_wait_ready();
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}
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void imx233_lcdif_pio_send(bool data_mode, unsigned len, void *buf)
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{
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imx233_lcdif_wait_ready();
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if(len == 0)
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return;
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#if IMX233_SUBTARGET >= 3780
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imx233_lcdif_enable_bus_master(false);
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#endif
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if(data_mode)
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BF_SET(LCDIF_CTRL, DATA_SELECT);
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else
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BF_CLR(LCDIF_CTRL, DATA_SELECT);
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switch(BF_RD(LCDIF_CTRL, WORD_LENGTH))
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{
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case BV_LCDIF_CTRL_WORD_LENGTH__8_BIT: pio_send(len, 1, buf); break;
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case BV_LCDIF_CTRL_WORD_LENGTH__16_BIT: pio_send(len, 2, buf); break;
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#if IMX233_SUBTARGET >= 3780
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case BV_LCDIF_CTRL_WORD_LENGTH__18_BIT: pio_send(len, 4, buf); break;
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#endif
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default: panicf("Don't know how to handle this word length");
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}
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}
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void imx233_lcdif_dma_send(void *buf, unsigned width, unsigned height)
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{
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#if IMX233_SUBTARGET >= 3780
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imx233_lcdif_enable_bus_master(true);
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HW_LCDIF_CUR_BUF = (uint32_t)buf;
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BF_WR_ALL(LCDIF_TRANSFER_COUNT, V_COUNT(height), H_COUNT(width));
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BF_SET(LCDIF_CTRL, DATA_SELECT);
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BF_SET(LCDIF_CTRL, RUN);
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#else
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(void) buf;
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(void) width;
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(void) height;
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panicf("Unimplemented");
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#endif
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}
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static void setup_data_pins(unsigned bus_width)
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{
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imx233_pinctrl_setup_vpin(VPIN_LCD_D0, "lcd d0", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D1, "lcd d1", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D2, "lcd d2", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D3, "lcd d3", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D4, "lcd d4", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D5, "lcd d5", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D6, "lcd d6", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D7, "lcd d7", PINCTRL_DRIVE_4mA, false);
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if(bus_width >= 16)
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{
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imx233_pinctrl_setup_vpin(VPIN_LCD_D8, "lcd d8", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D9, "lcd d9", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D10, "lcd d10", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D11, "lcd d11", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D12, "lcd d12", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D13, "lcd d13", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D14, "lcd d14", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D15, "lcd d15", PINCTRL_DRIVE_4mA, false);
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}
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#if IMX233_SUBTARGET >= 3780
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if(bus_width >= 18)
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{
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imx233_pinctrl_setup_vpin(VPIN_LCD_D16, "lcd d16", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_D17, "lcd d17", PINCTRL_DRIVE_4mA, false);
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}
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#endif
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}
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void imx233_lcdif_setup_system_pins(unsigned bus_width)
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{
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imx233_pinctrl_setup_vpin(VPIN_LCD_RESET, "lcd reset", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_RS, "lcd rs", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_WR, "lcd wr", PINCTRL_DRIVE_4mA, false);
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#ifdef VPIN_LCD_RD
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imx233_pinctrl_setup_vpin(VPIN_LCD_RD, "lcd rd", PINCTRL_DRIVE_4mA, false);
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#endif
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imx233_pinctrl_setup_vpin(VPIN_LCD_CS, "lcd cs", PINCTRL_DRIVE_4mA, false);
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setup_data_pins(bus_width);
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}
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#if IMX233_SUBTARGET >= 3700
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void imx233_lcdif_setup_dotclk_pins(unsigned bus_width, bool have_enable)
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{
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if(have_enable)
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imx233_pinctrl_setup_vpin(VPIN_LCD_ENABLE, "lcd enable", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_RESET, "lcd reset", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_HSYNC, "lcd hsync", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_VSYNC, "lcd vsync", PINCTRL_DRIVE_4mA, false);
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imx233_pinctrl_setup_vpin(VPIN_LCD_DOTCLK, "lcd dotclk", PINCTRL_DRIVE_4mA, false);
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setup_data_pins(bus_width);
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}
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void imx233_lcdif_set_byte_packing_format(unsigned byte_packing)
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{
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BF_WR(LCDIF_CTRL1, BYTE_PACKING_FORMAT(byte_packing));
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}
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#endif
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#if IMX233_SUBTARGET >= 3700 && IMX233_SUBTARGET < 3780
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void imx233_lcdif_enable_sync_signals(bool en)
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{
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BF_WR(LCDIF_VDCTRL3, SYNC_SIGNALS_ON(en));
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}
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void imx233_lcdif_setup_dotclk(unsigned v_pulse_width, unsigned v_period,
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unsigned v_wait_cnt, unsigned v_active, unsigned h_pulse_width,
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unsigned h_period, unsigned h_wait_cnt, unsigned h_active, bool enable_present)
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{
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BF_WR_ALL(LCDIF_VDCTRL0, ENABLE_PRESENT(enable_present),
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VSYNC_PERIOD_UNIT(1), VSYNC_PULSE_WIDTH_UNIT(1),
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DOTCLK_V_VALID_DATA_CNT(v_active));
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BF_WR_ALL(LCDIF_VDCTRL1, VSYNC_PERIOD(v_period),
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VSYNC_PULSE_WIDTH(v_pulse_width));
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BF_WR_ALL(LCDIF_VDCTRL2, HSYNC_PULSE_WIDTH(h_pulse_width),
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HSYNC_PERIOD(h_period), DOTCLK_H_VALID_DATA_CNT(h_active));
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BF_WR_ALL(LCDIF_VDCTRL3, VERTICAL_WAIT_CNT(v_wait_cnt),
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HORIZONTAL_WAIT_CNT(h_wait_cnt));
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// setup dotclk mode, always bypass count, apparently data select is needed
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BF_SET(LCDIF_CTRL, DOTCLK_MODE, BYPASS_COUNT, DATA_SELECT);
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}
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void imx233_lcdif_setup_dotclk_ex(unsigned v_pulse_width, unsigned v_back_porch,
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unsigned v_front_porch, unsigned h_pulse_width, unsigned h_back_porch,
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unsigned h_front_porch, unsigned width, unsigned height, unsigned clk_per_pix,
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bool enable_present)
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{
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unsigned h_active = clk_per_pix * width;
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unsigned h_period = h_active + h_back_porch + h_front_porch;
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unsigned v_active = height;
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unsigned v_period = v_active + v_back_porch + v_front_porch;
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imx233_lcdif_setup_dotclk(v_pulse_width, v_period, v_back_porch, v_active,
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h_pulse_width, h_period, h_back_porch, h_active, enable_present);
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}
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void imx233_lcdif_enable_frame_done_irq(bool en)
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{
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if(en)
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BF_SET(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ_EN);
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else
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BF_CLR(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ_EN);
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BF_CLR(LCDIF_CTRL1, CUR_FRAME_DONE_IRQ);
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}
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void imx233_lcdif_set_frame_done_cb(lcdif_irq_cb_t cb)
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{
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g_cur_frame_cb = cb;
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}
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void imx233_lcdif_enable_vsync_edge_irq(bool en)
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{
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if(en)
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BF_SET(LCDIF_CTRL1, VSYNC_EDGE_IRQ_EN);
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else
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BF_CLR(LCDIF_CTRL1, VSYNC_EDGE_IRQ_EN);
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BF_CLR(LCDIF_CTRL1, VSYNC_EDGE_IRQ);
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}
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void imx233_lcdif_set_vsync_edge_cb(lcdif_irq_cb_t cb)
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{
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g_vsync_edge_cb = cb;
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}
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void imx233_lcdif_enable_underflow_irq(bool en)
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{
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if(en)
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BF_SET(LCDIF_CTRL1, UNDERFLOW_IRQ_EN);
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else
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BF_CLR(LCDIF_CTRL1, UNDERFLOW_IRQ_EN);
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BF_CLR(LCDIF_CTRL1, UNDERFLOW_IRQ);
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}
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void imx233_lcdif_set_underflow_cb(lcdif_irq_cb_t cb)
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{
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g_underflow_cb = cb;
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}
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#endif
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#if IMX233_SUBTARGET >= 3780
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void imx233_lcdif_set_lcd_databus_width(unsigned width)
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{
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switch(width)
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{
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case 8: BF_WR(LCDIF_CTRL, LCD_DATABUS_WIDTH_V(8_BIT)); break;
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case 16: BF_WR(LCDIF_CTRL, LCD_DATABUS_WIDTH_V(16_BIT)); break;
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case 18: BF_WR(LCDIF_CTRL, LCD_DATABUS_WIDTH_V(18_BIT)); break;
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case 24: BF_WR(LCDIF_CTRL, LCD_DATABUS_WIDTH_V(24_BIT)); break;
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default:
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panicf("this chip cannot handle a lcd bus width of %d", width);
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break;
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}
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}
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void imx233_lcdif_enable_underflow_recover(bool enable)
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{
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if(enable)
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BF_SET(LCDIF_CTRL1, RECOVER_ON_UNDERFLOW);
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else
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BF_CLR(LCDIF_CTRL1, RECOVER_ON_UNDERFLOW);
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}
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void imx233_lcdif_enable_bus_master(bool enable)
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{
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if(enable)
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|
BF_SET(LCDIF_CTRL, LCDIF_MASTER);
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else
|
|
BF_CLR(LCDIF_CTRL, LCDIF_MASTER);
|
|
}
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#endif
|