e286b0bbc0
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@27188 a1c6a512-1295-4272-9138-f99709370657
77 lines
2.5 KiB
ArmAsm
77 lines
2.5 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2010 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/***************************************************************************
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* void bitmod32(volatile uint32_t *addr, uint32_t bits, uint32_t mask)
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*/
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.section .text, "ax", %progbits
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.align 2
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.global bitmod32
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.type bitmod32, %function
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bitmod32:
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mrs r12, cpsr
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orr r3, r12, #0xc0
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msr cpsr_c, r3
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ldr r3, [r0]
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and r1, r1, r2 @ Only allow mod of bits in 'mask'
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bic r3, r3, r2 @ Clear mask bits
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orr r3, r3, r1 @ Set according to 'bits'
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str r3, [r0]
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msr cpsr_c, r12
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bx lr
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.size bitmod32, .-bitmod32
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/***************************************************************************
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* void bitset32(volatile uint32_t *addr, uint32_t mask)
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*/
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.section .text, "ax", %progbits
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.align 2
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.global bitset32
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.type bitset32, %function
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bitset32:
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mrs r12, cpsr
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orr r2, r12, #0xc0
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msr cpsr_c, r2
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ldr r2, [r0]
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orr r2, r2, r1
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str r2, [r0]
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msr cpsr_c, r12
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bx lr
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.size bitset32, .-bitset32
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/***************************************************************************
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* void bitclr32(volatile uint32_t *addr, uint32_t mask)
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*/
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.section .text, "ax", %progbits
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.align 2
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.global bitclr32
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.type bitclr32, %function
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bitclr32:
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mrs r12, cpsr
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orr r2, r12, #0xc0
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msr cpsr_c, r2
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ldr r2, [r0]
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bic r2, r2, r1
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str r2, [r0]
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msr cpsr_c, r12
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bx lr
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.size bitclr32, .-bitclr32
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