783c77531c
1. Slightly revised and regularized internal interface. Callback is used for read and write to provide completion signal instead of having two mechanisms. 2. Lower overhead for asynchronous or alterate completion callbacks. We now only init what is required by the transfer. A couple unneeded structure members were also nixed. 3. Fixes a bug that would neglect a semaphore wait if pumping the I2C interrupts in a loop when not in thread state or interrupts are masked. 4. Corrects broken initialization order by defining KDEV_INIT, which makes kernel_init() call kernel_device_init() to initialize additional devices _after_ the kernel, threading and synchronization objects are safe to use. 5. Locking set_cpu_frequency has to be done at the highest level in system.c to ensure the boost counter and the frequency are both set in agreement. Reconcile the locking inteface between PP and AMS (the only two currently using locking there) to keep it clean. Now works fine with voltages in GIT HEAD on my Fuze v2, type 0. Previously, everything crashed and died instantly. action.c calling set_cpu_frequency from a tick was part of it. The rest may have been related to 3. and 4. Honestly, I'm not certain! Testing by Mihail Zenkov indicates it solves our problems. This will get the developer builds running again after the kernel assert code push. Change-Id: Ie245994fb3e318dd5ef48e383ce61fdd977224d4
219 lines
6 KiB
C
219 lines
6 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Alan Korr
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* Copyright (C) 2007 by Michael Sevakis
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef SYSTEM_TARGET_H
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#define SYSTEM_TARGET_H
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#include <stdbool.h>
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#include "config.h"
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#include "system-arm.h"
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/* TODO: This header could be split in 2 */
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#if CONFIG_CPU == PP5002
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#define CPUFREQ_SLEEP 32768
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#define CPUFREQ_DEFAULT 24000000
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#define CPUFREQ_NORMAL 30000000
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#define CPUFREQ_MAX 80000000
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#else /* PP5022, PP5024 */
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#define CPUFREQ_SLEEP 32768
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#define CPUFREQ_DEFAULT 24000000
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#define CPUFREQ_NORMAL 30000000
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#define CPUFREQ_MAX 80000000
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#endif
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#define inl(a) (*(volatile unsigned long *) (a))
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#define outl(a,b) (*(volatile unsigned long *) (b) = (a))
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#define inb(a) (*(volatile unsigned char *) (a))
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#define outb(a,b) (*(volatile unsigned char *) (b) = (a))
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#define inw(a) (*(volatile unsigned short *) (a))
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#define outw(a,b) (*(volatile unsigned short *) (b) = (a))
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void usb_pin_init(void);
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bool usb_plugged(void);
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void firewire_insert_int(void);
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void usb_insert_int(void);
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static inline void udelay(unsigned usecs)
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{
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unsigned stop = USEC_TIMER + usecs;
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while (TIME_BEFORE(USEC_TIMER, stop));
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}
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static inline unsigned int current_core(void)
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{
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/*
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* PROCESSOR_ID seems to be 32-bits:
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* CPU = 0x55555555 = |01010101|01010101|01010101|01010101|
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* COP = 0xaaaaaaaa = |10101010|10101010|10101010|10101010|
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* ^
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*/
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unsigned int core;
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asm volatile (
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"ldrb %0, [%1] \n" /* Just load the LSB */
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"mov %0, %0, lsr #7 \n" /* Bit 7 => index */
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: "=r"(core) /* CPU=0, COP=1 */
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: "r"(&PROCESSOR_ID)
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);
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return core;
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}
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/* Return the actual ID instead of core index */
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static inline unsigned int processor_id(void)
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{
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unsigned int id;
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asm volatile (
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"ldrb %0, [%1] \n"
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: "=r"(id)
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: "r"(&PROCESSOR_ID)
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);
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return id;
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}
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#if CONFIG_CPU == PP5002
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static inline void sleep_core(int core)
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{
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asm volatile (
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/* Sleep: PP5002 crashes if the instruction that puts it to sleep is
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* located at 0xNNNNNNN0. 4/8/C works. This sequence makes sure
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* that the correct alternative is executed. Don't change the order
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* of the next 4 instructions! */
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"tst pc, #0x0c \n"
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"mov r0, #0xca \n"
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"strne r0, [%[ctl]] \n"
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"streq r0, [%[ctl]] \n"
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"nop \n" /* nop's needed because of pipeline */
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"nop \n"
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"nop \n"
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:
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: [ctl]"r"(&PROC_CTL(core))
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: "r0"
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);
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}
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static inline void wake_core(int core)
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{
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asm volatile (
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"mov r0, #0xce \n"
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"str r0, [%[ctl]] \n"
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:
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: [ctl]"r"(&PROC_CTL(core))
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: "r0"
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);
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}
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#else /* PP502x */
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static inline void sleep_core(int core)
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{
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asm volatile (
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"mov r0, #0x80000000 \n"
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"str r0, [%[ctl]] \n"
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"nop \n"
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:
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: [ctl]"r"(&PROC_CTL(core))
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: "r0"
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);
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}
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static inline void wake_core(int core)
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{
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asm volatile (
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"mov r0, #0 \n"
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"str r0, [%[ctl]] \n"
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:
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: [ctl]"r"(&PROC_CTL(core))
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: "r0"
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);
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}
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#endif
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void commit_dcache(void);
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void commit_discard_dcache(void);
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void commit_discard_idcache(void);
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#if defined(BOOTLOADER) && !defined(HAVE_BOOTLOADER_USB_MODE)
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/* All addresses within rockbox are in IRAM in the bootloader so
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are therefore uncached */
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#define UNCACHED_ADDR(a) (a)
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#else /* !BOOTLOADER */
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#if CONFIG_CPU == PP5002
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#define UNCACHED_BASE_ADDR 0x28000000
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#else /* PP502x */
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#define UNCACHED_BASE_ADDR 0x10000000
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#endif
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#define UNCACHED_ADDR(a) \
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((typeof (a))((uintptr_t)(a) | UNCACHED_BASE_ADDR))
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#endif /* BOOTLOADER */
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#if defined(CPU_PP502x) && defined(HAVE_ATA_DMA)
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#define STORAGE_WANTS_ALIGN
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#endif
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#if defined(IPOD_VIDEO) && !defined(BOOTLOADER)
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extern unsigned char probed_ramsize;
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int battery_default_capacity(void);
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#endif
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#ifdef BOOTLOADER
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#if defined(TATUNG_TPJ1022)
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/* Some targets don't like yielding in the bootloader - force
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* yield() to return without a context switch. */
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#define YIELD_KERNEL_HOOK() true
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#endif
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#ifdef HAVE_BOOTLOADER_USB_MODE
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void tick_stop(void);
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void system_prepare_fw_start(void);
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#else /* !HAVE_BOOTLOADER_USB_MODE */
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/* Busy "sleep" without a tick */
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#define SLEEP_KERNEL_HOOK(ticks) \
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({ unsigned _stop = USEC_TIMER + ((ticks) + 1) * (1000000/HZ); \
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while (TIME_BEFORE(USEC_TIMER, _stop)) \
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switch_thread(); \
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true; })
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#endif /* HAVE_BOOTLOADER_USB_MODE */
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#endif /* BOOTLOADER */
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#if defined(HAVE_ADJUSTABLE_CPU_FREQ) && (NUM_CORES > 1)
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#define CPU_BOOST_LOCK_DEFINED
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static inline bool cpu_boost_lock(void)
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{
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void set_cpu_frequency__lock(void);
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set_cpu_frequency__lock();
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return true;
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}
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static inline void cpu_boost_unlock(void)
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{
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void set_cpu_frequency__unlock(void);
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set_cpu_frequency__unlock();
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}
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#endif /* HAVE_ADJUSTABLE_CPU_FREQ && NUM_CORES > 1 */
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#endif /* SYSTEM_TARGET_H */
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