1ba5ef716d
As preparation to add new targets to the s5l8702 directory, rename files as: s5l8702/ipod6g/*-ipod6g.c -> s5l8702/ipod6g/*-6g.c Change-Id: I0cd03d6bcf39b2aa198235f9014cb6948bbafcd5
578 lines
16 KiB
C
578 lines
16 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id: lcd-nano2g.c 28868 2010-12-21 06:59:17Z Buschel $
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*
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* Copyright (C) 2009 by Dave Chapman
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "hwcompat.h"
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#include "kernel.h"
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#include "lcd.h"
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#include "system.h"
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#include "cpu.h"
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#include "pmu-target.h"
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#include "power.h"
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#include "string.h"
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#include "dma-s5l8702.h"
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#define R_HORIZ_GRAM_ADDR_SET 0x200
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#define R_VERT_GRAM_ADDR_SET 0x201
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#define R_WRITE_DATA_TO_GRAM 0x202
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#define R_HORIZ_ADDR_START_POS 0x210
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#define R_HORIZ_ADDR_END_POS 0x211
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#define R_VERT_ADDR_START_POS 0x212
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#define R_VERT_ADDR_END_POS 0x213
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/* LCD type 1 register defines */
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#define R_COLUMN_ADDR_SET 0x2a
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#define R_ROW_ADDR_SET 0x2b
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#define R_MEMORY_WRITE 0x2c
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/** globals **/
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int lcd_type; /* also needed in debug-s5l8702.c */
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static struct mutex lcd_mutex;
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static uint16_t lcd_dblbuf[LCD_HEIGHT][LCD_WIDTH] CACHEALIGN_ATTR;
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static bool lcd_ispowered;
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#define CMD 0 /* send command with N data */
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#define MREG 1 /* write multiple registers */
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#define SLEEP 2
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#define END 0xff
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#define CMD16(len) (CMD | ((len) << 8))
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#define MREG16(len) (MREG | ((len) << 8))
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#define SLEEP16(t) (SLEEP | ((t) << 8))
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/* powersave sequences */
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static const unsigned char lcd_sleep_seq_01[] =
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{
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CMD, 0x28, 0, /* Display Off */
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SLEEP, 5, /* 50 ms */
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CMD, 0x10, 0, /* Sleep In Mode */
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SLEEP, 5, /* 50 ms */
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END
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};
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static const unsigned short lcd_enter_deepstby_seq_23[] =
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{
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/* Display Off */
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MREG16(1), 0x007, 0x0172,
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MREG16(1), 0x030, 0x03ff,
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SLEEP16(9),
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MREG16(1), 0x007, 0x0120,
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MREG16(1), 0x030, 0x0000,
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MREG16(1), 0x100, 0x0780,
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MREG16(1), 0x007, 0x0000,
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MREG16(1), 0x101, 0x0260,
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MREG16(1), 0x102, 0x00a9,
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SLEEP16(3),
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MREG16(1), 0x100, 0x0700,
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/* Deep Standby Mode */
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MREG16(1), 0x100, 0x0704,
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SLEEP16(5),
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END
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};
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/* init sequences */
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#ifdef HAVE_LCD_SLEEP
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static const unsigned char lcd_awake_seq_01[] =
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{
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CMD, 0x11, 0, /* Sleep Out Mode */
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SLEEP, 6, /* 60 ms */
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CMD, 0x29, 0, /* Display On */
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END
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};
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#endif
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#if defined(HAVE_LCD_SLEEP) || defined(BOOTLOADER)
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static const unsigned short lcd_init_seq_23[] =
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{
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/* Display settings */
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MREG16(1), 0x008, 0x0808,
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MREG16(7), 0x010, 0x0013, 0x0300, 0x0101, 0x0a03, 0x0a0e, 0x0a19, 0x2402,
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MREG16(1), 0x018, 0x0001,
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MREG16(1), 0x090, 0x0021,
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/* Gamma settings */
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MREG16(14), 0x300, 0x0307, 0x0003, 0x0402, 0x0303, 0x0300, 0x0407, 0x1c04,
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0x0307, 0x0003, 0x0402, 0x0303, 0x0300, 0x0407, 0x1c04,
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MREG16(14), 0x310, 0x0707, 0x0407, 0x0306, 0x0303, 0x0300, 0x0407, 0x1c01,
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0x0707, 0x0407, 0x0306, 0x0303, 0x0300, 0x0407, 0x1c01,
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MREG16(14), 0x320, 0x0206, 0x0102, 0x0404, 0x0303, 0x0300, 0x0407, 0x1c1f,
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0x0206, 0x0102, 0x0404, 0x0303, 0x0300, 0x0407, 0x1c1f,
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/* GRAM and Base Imagen settings (ili9326ds) */
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MREG16(2), 0x400, 0x001d, 0x0001,
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MREG16(1), 0x205, 0x0060,
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/* Power settings */
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MREG16(1), 0x007, 0x0001,
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MREG16(1), 0x031, 0x0071,
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MREG16(1), 0x110, 0x0001,
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MREG16(6), 0x100, 0x17b0, 0x0220, 0x00bd, 0x1500, 0x0103, 0x0105,
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/* Display On */
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MREG16(1), 0x007, 0x0021,
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MREG16(1), 0x001, 0x0110,
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MREG16(1), 0x003, 0x0230,
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MREG16(1), 0x002, 0x0500,
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MREG16(1), 0x007, 0x0031,
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MREG16(1), 0x030, 0x0007,
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SLEEP16(3),
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MREG16(1), 0x030, 0x03ff,
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SLEEP16(6),
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MREG16(1), 0x007, 0x0072,
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SLEEP16(15),
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MREG16(1), 0x007, 0x0173,
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END
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};
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#endif /* HAVE_LCD_SLEEP || BOOTLOADER */
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#ifdef BOOTLOADER
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static const unsigned char lcd_init_seq_0[] =
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{
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CMD, 0x11, 0, /* Sleep Out Mode */
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SLEEP, 0x03, /* 30 ms */
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CMD, 0x35, 1, 0x00, /* TEON (TBC) */
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CMD, 0x3a, 1, 0x06, /* COLMOD (TBC) */
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CMD, 0x36, 1, 0x00, /* MADCTR (TBC) */
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CMD, 0x13, 0, /* NORON: Normal Mode On (Partial
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Mode Off, Scroll Mode Off) */
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CMD, 0x29, 0, /* Display On */
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END
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};
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static const unsigned char lcd_init_seq_1[] =
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{
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CMD, 0xb0, 21, 0x3a, 0x3a, 0x80, 0x80, 0x0a, 0x0a, 0x0a, 0x0a,
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0x0a, 0x0a, 0x0a, 0x0a, 0x3c, 0x30, 0x0f, 0x00,
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0x01, 0x54, 0x06, 0x66, 0x66,
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CMD, 0xb8, 1, 0xd8,
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CMD, 0xb1, 30, 0x14, 0x59, 0x00, 0x15, 0x57, 0x27, 0x04, 0x85,
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0x14, 0x59, 0x00, 0x15, 0x57, 0x27, 0x04, 0x85,
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0x14, 0x09, 0x15, 0x57, 0x27, 0x04, 0x05,
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0x14, 0x09, 0x15, 0x57, 0x27, 0x04, 0x05,
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CMD, 0xd2, 1, 0x01,
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/* Gamma settings (TBC) */
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CMD, 0xe0, 13, 0x00, 0x00, 0x00, 0x05, 0x0b, 0x12, 0x16, 0x1f,
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0x25, 0x22, 0x24, 0x29, 0x1c,
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CMD, 0xe1, 13, 0x08, 0x01, 0x01, 0x06, 0x0b, 0x11, 0x15, 0x1f,
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0x27, 0x26, 0x29, 0x2f, 0x1e,
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CMD, 0xe2, 13, 0x07, 0x01, 0x01, 0x05, 0x09, 0x0f, 0x13, 0x1e,
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0x26, 0x25, 0x28, 0x2e, 0x1e,
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CMD, 0xe3, 13, 0x00, 0x00, 0x00, 0x05, 0x0b, 0x12, 0x16, 0x1f,
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0x25, 0x22, 0x24, 0x29, 0x1c,
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CMD, 0xe4, 13, 0x08, 0x01, 0x01, 0x06, 0x0b, 0x11, 0x15, 0x1f,
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0x27, 0x26, 0x29, 0x2f, 0x1e,
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CMD, 0xe5, 13, 0x07, 0x01, 0x01, 0x05, 0x09, 0x0f, 0x13, 0x1e,
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0x26, 0x25, 0x28, 0x2e, 0x1e,
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CMD, 0x3a, 1, 0x06, /* COLMOD (TBC) */
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CMD, 0xc2, 1, 0x00, /* Power Control 3 (TBC) */
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CMD, 0x35, 1, 0x00, /* TEON (TBC) */
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CMD, 0x11, 0, /* Sleep Out Mode */
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SLEEP, 0x06, /* 60 ms */
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CMD, 0x13, 0, /* NORON: Normal Mode On (Partial
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Mode Off, Scroll Mode Off) */
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CMD, 0x29, 0, /* Display On */
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END
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};
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#endif
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/* DMA configuration */
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/* one single transfer at once, needed LLIs:
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* screen_size / (DMAC_LLI_MAX_COUNT << swidth) =
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* (320*240*2) / (4095*2) = 19
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*/
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#define LCD_DMA_TSKBUF_SZ 1 /* N tasks, MUST be pow2 */
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#define LCD_DMA_LLIBUF_SZ 32 /* N LLIs, MUST be pow2 */
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static struct dmac_tsk lcd_dma_tskbuf[LCD_DMA_TSKBUF_SZ];
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static struct dmac_lli volatile \
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lcd_dma_llibuf[LCD_DMA_LLIBUF_SZ] CACHEALIGN_ATTR;
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static struct dmac_ch lcd_dma_ch = {
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.dmac = &s5l8702_dmac0,
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.prio = DMAC_CH_PRIO(4),
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.cb_fn = NULL,
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.tskbuf = lcd_dma_tskbuf,
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.tskbuf_mask = LCD_DMA_TSKBUF_SZ - 1,
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.queue_mode = QUEUE_NORMAL,
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.llibuf = lcd_dma_llibuf,
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.llibuf_mask = LCD_DMA_LLIBUF_SZ - 1,
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.llibuf_bus = DMAC_MASTER_AHB1,
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};
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static struct dmac_ch_cfg lcd_dma_ch_cfg = {
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.srcperi = S5L8702_DMAC0_PERI_MEM,
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.dstperi = S5L8702_DMAC0_PERI_LCD_WR,
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.sbsize = DMACCxCONTROL_BSIZE_1,
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.dbsize = DMACCxCONTROL_BSIZE_1,
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.swidth = DMACCxCONTROL_WIDTH_16,
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.dwidth = DMACCxCONTROL_WIDTH_16,
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.sbus = DMAC_MASTER_AHB1,
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.dbus = DMAC_MASTER_AHB1,
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.sinc = DMACCxCONTROL_INC_ENABLE,
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.dinc = DMACCxCONTROL_INC_DISABLE,
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.prot = DMAC_PROT_CACH | DMAC_PROT_BUFF | DMAC_PROT_PRIV,
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.lli_xfer_max_count = DMAC_LLI_MAX_COUNT,
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};
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static inline void s5l_lcd_write_reg(int cmd, unsigned int data)
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{
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while (LCD_STATUS & 0x10);
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LCD_WCMD = cmd;
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while (LCD_STATUS & 0x10);
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/* 16-bit/1-transfer data format (ili9320ds s7.2.2) */
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LCD_WDATA = (data & 0x78ff) |
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((data & 0x0300) << 1) | ((data & 0x0400) << 5);
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}
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static inline void s5l_lcd_write_cmd(unsigned short cmd)
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{
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while (LCD_STATUS & 0x10);
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LCD_WCMD = cmd;
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}
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static inline void s5l_lcd_write_data(unsigned short data)
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{
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while (LCD_STATUS & 0x10);
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LCD_WDATA = data;
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}
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static void lcd_run_seq8(const unsigned char *seq)
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{
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int n;
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while (1) switch (*seq++)
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{
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case CMD:
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s5l_lcd_write_cmd(*seq++);
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n = *seq++;
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while (n--)
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s5l_lcd_write_data(*seq++);
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break;
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case SLEEP:
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sleep(*seq++);
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break;
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case END:
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default:
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/* bye */
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return;
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}
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}
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static void lcd_run_seq16(const unsigned short *seq)
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{
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int action, param;
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unsigned short reg;
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while (1)
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{
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action = *seq & 0xff;
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param = *seq++ >> 8;
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switch (action)
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{
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case MREG:
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reg = *seq++;
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while (param--)
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s5l_lcd_write_reg(reg++, *seq++);
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break;
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case SLEEP:
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sleep(param);
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break;
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case END:
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default:
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/* bye */
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return;
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}
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}
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}
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/*** hardware configuration ***/
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int lcd_default_contrast(void)
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{
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return 0x1f;
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}
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void lcd_set_contrast(int val)
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{
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(void)val;
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}
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void lcd_set_invert_display(bool yesno)
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{
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(void)yesno;
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}
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void lcd_set_flip(bool yesno)
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{
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(void)yesno;
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}
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bool lcd_active(void)
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{
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return lcd_ispowered;
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}
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void lcd_powersave(void)
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{
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mutex_lock(&lcd_mutex);
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if (lcd_type & 2)
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lcd_run_seq16(lcd_enter_deepstby_seq_23);
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else
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lcd_run_seq8(lcd_sleep_seq_01);
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/* mask lcd controller clock gate */
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PWRCON(0) |= (1 << CLOCKGATE_LCD);
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lcd_ispowered = false;
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mutex_unlock(&lcd_mutex);
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}
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void lcd_shutdown(void)
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{
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pmu_write(0x2b, 0); /* Kill the backlight, instantly. */
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pmu_write(0x29, 0);
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lcd_powersave();
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}
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#ifdef HAVE_LCD_SLEEP
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void lcd_sleep(void)
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{
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lcd_powersave();
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}
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void lcd_awake(void)
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{
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mutex_lock(&lcd_mutex);
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/* unmask lcd controller clock gate */
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PWRCON(0) &= ~(1 << CLOCKGATE_LCD);
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if (lcd_type & 2) {
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/* release from deep standby mode (ili9320ds s12.3) */
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for (int i = 0; i < 6; i++) {
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s5l_lcd_write_cmd(0x000);
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udelay(1000);
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}
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lcd_run_seq16(lcd_init_seq_23);
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}
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else
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lcd_run_seq8(lcd_awake_seq_01);
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lcd_ispowered = true;
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mutex_unlock(&lcd_mutex);
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send_event(LCD_EVENT_ACTIVATION, NULL);
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}
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#endif
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/* LCD init */
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void lcd_init_device(void)
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{
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mutex_init(&lcd_mutex);
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/* unmask lcd controller clock gate */
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PWRCON(0) &= ~(1 << CLOCKGATE_LCD);
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/* Detect lcd type */
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lcd_type = (PDAT6 & 0x30) >> 4;
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while (!(LCD_STATUS & 0x2));
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LCD_CONFIG = 0x80100db0;
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LCD_PHTIME = 0x33;
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/* Configure DMA channel */
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dmac_ch_init(&lcd_dma_ch, &lcd_dma_ch_cfg);
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#ifdef BOOTLOADER
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switch (lcd_type) {
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case 0: lcd_run_seq8(lcd_init_seq_0); break;
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case 1: lcd_run_seq8(lcd_init_seq_1); break;
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default: lcd_run_seq16(lcd_init_seq_23); break;
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}
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#endif
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lcd_ispowered = true;
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}
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/*** Update functions ***/
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static inline void lcd_write_pixel(fb_data pixel)
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{
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mutex_lock(&lcd_mutex);
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LCD_WDATA = pixel;
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mutex_unlock(&lcd_mutex);
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}
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/* Update the display.
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This must be called after all other LCD functions that change the display. */
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void lcd_update(void) ICODE_ATTR;
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void lcd_update(void)
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{
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lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT);
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}
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/* Line write helper function. */
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extern void lcd_write_line(const fb_data *addr,
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int pixelcount,
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const unsigned int lcd_base_addr);
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static void displaylcd_setup(int x, int y, int width, int height) ICODE_ATTR;
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static void displaylcd_setup(int x, int y, int width, int height)
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{
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/* TODO: ISR()->panicf()->lcd_update() blocks forever */
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mutex_lock(&lcd_mutex);
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while (dmac_ch_running(&lcd_dma_ch))
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yield();
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int xe = (x + width) - 1; /* max horiz */
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int ye = (y + height) - 1; /* max vert */
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if (lcd_type & 2) {
|
|
s5l_lcd_write_reg(R_HORIZ_ADDR_START_POS, x);
|
|
s5l_lcd_write_reg(R_HORIZ_ADDR_END_POS, xe);
|
|
s5l_lcd_write_reg(R_VERT_ADDR_START_POS, y);
|
|
s5l_lcd_write_reg(R_VERT_ADDR_END_POS, ye);
|
|
|
|
s5l_lcd_write_reg(R_HORIZ_GRAM_ADDR_SET, x);
|
|
s5l_lcd_write_reg(R_VERT_GRAM_ADDR_SET, y);
|
|
|
|
s5l_lcd_write_cmd(R_WRITE_DATA_TO_GRAM);
|
|
} else {
|
|
s5l_lcd_write_cmd(R_COLUMN_ADDR_SET);
|
|
s5l_lcd_write_data(x >> 8);
|
|
s5l_lcd_write_data(x & 0xff);
|
|
s5l_lcd_write_data(xe >> 8);
|
|
s5l_lcd_write_data(xe & 0xff);
|
|
|
|
s5l_lcd_write_cmd(R_ROW_ADDR_SET);
|
|
s5l_lcd_write_data(y >> 8);
|
|
s5l_lcd_write_data(y & 0xff);
|
|
s5l_lcd_write_data(ye >> 8);
|
|
s5l_lcd_write_data(ye & 0xff);
|
|
|
|
s5l_lcd_write_cmd(R_MEMORY_WRITE);
|
|
}
|
|
}
|
|
|
|
static void displaylcd_dma(int pixels) ICODE_ATTR;
|
|
static void displaylcd_dma(int pixels)
|
|
{
|
|
commit_dcache();
|
|
dmac_ch_queue(&lcd_dma_ch, lcd_dblbuf,
|
|
(void*)S5L8702_DADDR_PERI_LCD_WR, pixels*2, NULL);
|
|
mutex_unlock(&lcd_mutex);
|
|
}
|
|
|
|
/* Update a fraction of the display. */
|
|
void lcd_update_rect(int, int, int, int) ICODE_ATTR;
|
|
void lcd_update_rect(int x, int y, int width, int height)
|
|
{
|
|
int pixels = width * height;
|
|
fb_data* p = FBADDR(x,y);
|
|
uint16_t* out = lcd_dblbuf[0];
|
|
|
|
#ifdef HAVE_LCD_SLEEP
|
|
if (!lcd_active()) return;
|
|
#endif
|
|
|
|
displaylcd_setup(x, y, width, height);
|
|
|
|
/* Copy display bitmap to hardware */
|
|
if (LCD_WIDTH == width) {
|
|
/* Write all lines at once */
|
|
memcpy(out, p, pixels * 2);
|
|
} else {
|
|
do {
|
|
/* Write a single line */
|
|
memcpy(out, p, width * 2);
|
|
p += LCD_WIDTH;
|
|
out += width;
|
|
} while (--height);
|
|
}
|
|
|
|
displaylcd_dma(pixels);
|
|
}
|
|
|
|
/* Line write helper function for lcd_yuv_blit. Writes two lines of yuv420. */
|
|
extern void lcd_write_yuv420_lines(unsigned char const * const src[3],
|
|
uint16_t* outbuf,
|
|
int width,
|
|
int stride);
|
|
|
|
/* Blit a YUV bitmap directly to the LCD */
|
|
void lcd_blit_yuv(unsigned char * const src[3],
|
|
int src_x, int src_y, int stride,
|
|
int x, int y, int width, int height) ICODE_ATTR;
|
|
void lcd_blit_yuv(unsigned char * const src[3],
|
|
int src_x, int src_y, int stride,
|
|
int x, int y, int width, int height)
|
|
{
|
|
unsigned int z;
|
|
unsigned char const * yuv_src[3];
|
|
|
|
#ifdef HAVE_LCD_SLEEP
|
|
if (!lcd_active()) return;
|
|
#endif
|
|
|
|
width = (width + 1) & ~1; /* ensure width is even */
|
|
|
|
int pixels = width * height;
|
|
uint16_t* out = lcd_dblbuf[0];
|
|
|
|
z = stride * src_y;
|
|
yuv_src[0] = src[0] + z + src_x;
|
|
yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
|
|
yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
|
|
|
|
displaylcd_setup(x, y, width, height);
|
|
|
|
height >>= 1;
|
|
|
|
do {
|
|
lcd_write_yuv420_lines(yuv_src, out, width, stride);
|
|
yuv_src[0] += stride << 1;
|
|
yuv_src[1] += stride >> 1; /* Skip down one chroma line */
|
|
yuv_src[2] += stride >> 1;
|
|
out += width << 1;
|
|
} while (--height);
|
|
|
|
displaylcd_dma(pixels);
|
|
}
|