193 lines
6.7 KiB
C
193 lines
6.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by amaury Pouly
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*
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* Based on Rockbox iriver bootloader by Linus Nielsen Feltzing
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* and the ipodlinux bootloader by Daniel Palffy and Bernard Leach
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "kernel.h"
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#include "dma-imx233.h"
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#include "i2c-imx233.h"
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#include "pinctrl-imx233.h"
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/* Used for DMA */
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struct i2c_dma_command_t
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{
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struct apb_dma_command_t dma;
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/* PIO words */
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uint32_t ctrl0;
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};
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#define I2C_NR_STAGES 4
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/* Current transfer */
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static int i2c_nr_stages;
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static struct i2c_dma_command_t i2c_stage[I2C_NR_STAGES];
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static struct mutex i2c_mutex;
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static struct semaphore i2c_sema;
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void INT_I2C_DMA(void)
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{
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/* reset dma channel on error */
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if(imx233_dma_is_channel_error_irq(APB_I2C))
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imx233_dma_reset_channel(APB_I2C);
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/* clear irq flags */
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imx233_dma_clear_channel_interrupt(APB_I2C);
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semaphore_release(&i2c_sema);
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}
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void imx233_i2c_init(void)
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{
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//imx233_reset_block(&HW_I2C_CTRL0);
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__REG_SET(HW_I2C_CTRL0) = __BLOCK_SFTRST;
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/* setup pins (must be done when shutdown) */
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imx233_pinctrl_acquire_pin(0, 30, "i2c");
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imx233_pinctrl_acquire_pin(0, 31, "i2c");
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imx233_set_pin_function(0, 30, PINCTRL_FUNCTION_MAIN);
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imx233_set_pin_function(0, 31, PINCTRL_FUNCTION_MAIN);
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/* clear softreset */
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__REG_CLR(HW_I2C_CTRL0) = __BLOCK_SFTRST | __BLOCK_CLKGATE;
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/* Errata:
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* When RETAIN_CLOCK is set, the ninth clock pulse (ACK) is not generated. However, the SDA
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* line is read at the proper timing interval. If RETAIN_CLOCK is cleared, the ninth clock pulse is
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* generated.
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* HW_I2C_CTRL1[ACK_MODE] has default value of 0. It should be set to 1 to enable the fix for
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* this issue.
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*/
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__REG_SET(HW_I2C_CTRL1) = HW_I2C_CTRL1__ACK_MODE;
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__REG_SET(HW_I2C_CTRL0) = __BLOCK_CLKGATE;
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/* Fast-mode @ 400K */
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HW_I2C_TIMING0 = 0x000F0007; /* tHIGH=0.6us, read at 0.3us */
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HW_I2C_TIMING1 = 0x001F000F; /* tLOW=1.3us, write at 0.6us */
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HW_I2C_TIMING2 = 0x0015000D;
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mutex_init(&i2c_mutex);
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semaphore_init(&i2c_sema, 1, 0);
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}
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void imx233_i2c_begin(void)
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{
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mutex_lock(&i2c_mutex);
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/* wakeup */
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__REG_CLR(HW_I2C_CTRL0) = __BLOCK_CLKGATE;
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i2c_nr_stages = 0;
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}
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enum imx233_i2c_error_t imx233_i2c_add(bool start, bool transmit, void *buffer, unsigned size, bool stop)
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{
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if(i2c_nr_stages == I2C_NR_STAGES)
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return I2C_ERROR;
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if(i2c_nr_stages > 0)
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{
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i2c_stage[i2c_nr_stages - 1].dma.next = &i2c_stage[i2c_nr_stages].dma;
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i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__CHAIN;
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if(!start)
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i2c_stage[i2c_nr_stages - 1].ctrl0 |= HW_I2C_CTRL0__RETAIN_CLOCK;
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}
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i2c_stage[i2c_nr_stages].dma.buffer = buffer;
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i2c_stage[i2c_nr_stages].dma.next = NULL;
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i2c_stage[i2c_nr_stages].dma.cmd =
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(transmit ? HW_APB_CHx_CMD__COMMAND__READ : HW_APB_CHx_CMD__COMMAND__WRITE) |
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HW_APB_CHx_CMD__WAIT4ENDCMD |
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1 << HW_APB_CHx_CMD__CMDWORDS_BP |
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size << HW_APB_CHx_CMD__XFER_COUNT_BP;
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/* assume that any read is final (send nak on last) */
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i2c_stage[i2c_nr_stages].ctrl0 = size |
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(transmit ? HW_I2C_CTRL0__TRANSMIT : HW_I2C_CTRL0__SEND_NAK_ON_LAST) |
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(start ? HW_I2C_CTRL0__PRE_SEND_START : 0) |
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(stop ? HW_I2C_CTRL0__POST_SEND_STOP : 0) |
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HW_I2C_CTRL0__MASTER_MODE;
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i2c_nr_stages++;
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return I2C_SUCCESS;
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}
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enum imx233_i2c_error_t imx233_i2c_end(unsigned timeout)
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{
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if(i2c_nr_stages == 0)
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return I2C_ERROR;
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i2c_stage[i2c_nr_stages - 1].dma.cmd |= HW_APB_CHx_CMD__SEMAPHORE | HW_APB_CHx_CMD__IRQONCMPLT;
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__REG_CLR(HW_I2C_CTRL1) = HW_I2C_CTRL1__ALL_IRQ;
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imx233_dma_reset_channel(APB_I2C);
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imx233_icoll_enable_interrupt(INT_SRC_I2C_DMA, true);
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imx233_dma_enable_channel_interrupt(APB_I2C, true);
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imx233_dma_start_command(APB_I2C, &i2c_stage[0].dma);
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enum imx233_i2c_error_t ret;
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if(semaphore_wait(&i2c_sema, timeout) == OBJ_WAIT_TIMEDOUT)
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{
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imx233_dma_reset_channel(APB_I2C);
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ret = I2C_TIMEOUT;
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}
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else if(HW_I2C_CTRL1 & HW_I2C_CTRL1__MASTER_LOSS_IRQ)
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ret = I2C_MASTER_LOSS;
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else if(HW_I2C_CTRL1 & HW_I2C_CTRL1__NO_SLAVE_ACK_IRQ)
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ret= I2C_NO_SLAVE_ACK;
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else if(HW_I2C_CTRL1 & HW_I2C_CTRL1__EARLY_TERM_IRQ)
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ret = I2C_SLAVE_NAK;
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else
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ret = I2C_SUCCESS;
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/* sleep */
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__REG_SET(HW_I2C_CTRL0) = __BLOCK_CLKGATE;
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mutex_unlock(&i2c_mutex);
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return ret;
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}
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void i2c_init(void)
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{
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}
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int i2c_write(int device, const unsigned char* buf, int count)
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{
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uint8_t addr = device;
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imx233_i2c_begin();
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imx233_i2c_add(true, true, &addr, 1, false); /* start + addr */
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imx233_i2c_add(false, true, (void *)buf, count, true); /* data + stop */
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return imx233_i2c_end(TIMEOUT_BLOCK);
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}
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int i2c_read(int device, unsigned char* buf, int count)
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{
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uint8_t addr = device | 1;
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imx233_i2c_begin();
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imx233_i2c_add(true, true, &addr, 1, false); /* start + addr */
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imx233_i2c_add(false, false, buf, count, true); /* data + stop */
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return imx233_i2c_end(TIMEOUT_BLOCK);
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}
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int i2c_readmem(int device, int address, unsigned char* buf, int count)
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{
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uint8_t start[2] = {device, address};
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uint8_t addr_rd = device | 1;
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imx233_i2c_begin();
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imx233_i2c_add(true, true, start, 2, false); /* start + addr + addr */
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imx233_i2c_add(true, true, &addr_rd, 1, false); /* start + addr */
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imx233_i2c_add(false, false, buf, count, true); /* data + stop */
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return imx233_i2c_end(TIMEOUT_BLOCK);
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}
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int i2c_writemem(int device, int address, const unsigned char* buf, int count)
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{
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uint8_t start[2] = {device, address};
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imx233_i2c_begin();
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imx233_i2c_add(true, true, start, 2, false); /* start + addr + addr */
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imx233_i2c_add(false, true, (void *)buf, count, true); /* data + stop */
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return imx233_i2c_end(TIMEOUT_BLOCK);
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}
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