2acc0ac542
later. We still need to hunt down snippets used that are not. 1324 modified files... http://www.rockbox.org/mail/archive/rockbox-dev-archive-2008-06/0060.shtml git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17847 a1c6a512-1295-4272-9138-f99709370657
245 lines
6.4 KiB
ArmAsm
245 lines
6.4 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Linus Nielsen Feltzing
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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/* Arm bootloader and startup code based on startup.s from the iPodLinux loader
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*
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* Copyright (c) 2003, Daniel Palffy (dpalffy (at) rainstorm.org)
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* Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
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*
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*/
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#include "config.h"
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#include "cpu.h"
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.section .init.text,"ax",%progbits
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.extern irq
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.extern fiq
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.extern UIE
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.extern main
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.global start
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/* Telechips firmware files start with a 32-byte header, as part of the code. */
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start:
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#ifdef TCCBOOT
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/* Add -DTCCBOOT to EXTRA_DEFINES in the bootloader Makefile to
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enable building the bootloader to be appended to the end of the
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original firmware, dual-booting based on a key-press.
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The following two values are filled in by mktccboot.
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*/
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.word 0 /* Saved entrypoint of original firmware*/
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.word 0 /* Location in RAM of the start of our bootloader */
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#else
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// ldr pc, =start_loc /* jump to the main entry point */
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b start_loc
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.word 0xffff0601 /* Unknown magic */
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.word 0x3a726556 /* "Ver:" */
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.word 0x31373030 /* "0071" */
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.word 0 /* First CRC32 */
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.word 0 /* Unknown - always 0 */
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.word 0 /* Second CRC32 */
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.word 0 /* length of firmware file */
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#ifdef LOGIK_DAX
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/* Some original firmwares have 0x40 bytes of zeroes here - we
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don't know why, but err on the side of caution and include it
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here. */
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.space 0x40
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#endif
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#endif
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start_loc:
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#ifdef BOOTLOADER
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/*
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If we are appended to the OF (i.e. dual-booting), do a simple GPIO
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button check, and branch to the OF's entry point (saved by mktccboot)
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if not active
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*/
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#ifdef TCCBOOT
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mov r0, #0x80000000
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#ifdef LOGIK_DAX
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ldr r0, [r0, #0x300] /* Hold button is GPIO A, pin 0x2 */
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tst r0, #0x2
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#elif defined(SANSA_M200)
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ldr r0, [r0, #0x310] /* Hold button is GPIO B, pin 0x200 */
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tst r0, #0x200
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#else
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#error No bootup key detection implemented for this target
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#endif
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ldrne pc, [pc, #-28] /* Jump to OF if HOLD button not pressed */
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#endif /* TCCBOOT */
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/* We are now definitely executing the bootloader, so we relocate to the
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linked address (see boot.lds) - 1MB from the end of DRAM.
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*/
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#ifdef TCCBOOT
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ldr r0, [pc, #-28] /* mktccboot fills in the load address */
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#else
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mov r0, #0x20000000 /* Otherwise, load address is the start of DRAM */
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#endif
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mov r1, #0x20000000 /* Destination: 1MB from end of DRAM */
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add r1, r1, #((MEM - 1) * 0x100000)
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ldr r2, =_dataend
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1:
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cmp r2, r1
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ldrhi r3, [r0], #4
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strhi r3, [r1], #4
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bhi 1b
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ldr pc, =copied_start /* jump to the relocated start_loc: */
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copied_start:
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#endif /* BOOTLOADER */
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/* Set up stack for IRQ mode */
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mov r0,#0xd2
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msr cpsr, r0
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ldr sp, =irq_stack
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/* Set up stack for FIQ mode */
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mov r0,#0xd1
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msr cpsr, r0
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ldr sp, =fiq_stack
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/* Let abort and undefined modes use IRQ stack */
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mov r0,#0xd7
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msr cpsr, r0
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ldr sp, =irq_stack
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mov r0,#0xdb
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msr cpsr, r0
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ldr sp, =irq_stack
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/* Switch to supervisor mode */
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mov r0,#0xd3
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msr cpsr, r0
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ldr sp, =stackend
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/* Copy exception handler code to address 0 */
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mov r2, #0x0
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ldr r3, =vectors_start
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ldr r4, =vectors_end
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1:
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cmp r4, r3
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ldrhi r5, [r3], #4
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strhi r5, [r2], #4
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bhi 1b
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/* Initialise bss section to zero */
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ldr r2, =_edata
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ldr r3, =_end
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mov r4, #0
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1:
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cmp r3, r2
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strhi r4, [r2], #4
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bhi 1b
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/* Set up some stack and munge it with 0xdeadbeef */
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ldr sp, =stackend
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mov r3, sp
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ldr r2, =stackbegin
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ldr r4, =0xdeadbeef
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1:
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cmp r3, r2
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strhi r4, [r2], #4
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bhi 1b
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bl main
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/* main() should never return */
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/* Exception handlers. Will be copied to address 0 after memory remapping */
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vectors_start:
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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ldr pc, [pc, #24]
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/* Exception vectors */
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.global vectors
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vectors:
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.word start
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.word undef_instr_handler
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.word software_int_handler
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.word prefetch_abort_handler
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.word data_abort_handler
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.word reserved_handler
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.word irq_handler
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.word fiq_handler
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vectors_end:
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.text
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/* All illegal exceptions call into UIE with exception address as first
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parameter. This is calculated differently depending on which exception
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we're in. Second parameter is exception number, used for a string lookup
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in UIE.
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*/
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undef_instr_handler:
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mov r0, lr
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mov r1, #0
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b UIE
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/* We run supervisor mode most of the time, and should never see a software
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exception being thrown. Perhaps make it illegal and call UIE?
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*/
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software_int_handler:
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reserved_handler:
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movs pc, lr
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prefetch_abort_handler:
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sub r0, lr, #4
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mov r1, #1
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b UIE
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data_abort_handler:
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sub r0, lr, #8
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mov r1, #2
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b UIE
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irq_handler:
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stmfd sp!, {r0-r3, r12, lr}
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bl irq
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ldmfd sp!, {r0-r3, r12, lr}
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subs pc, lr, #4
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/* Align stacks to cache line boundary */
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.balign 16
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/* 256 words of IRQ stack */
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.space 256*4
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irq_stack:
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/* 256 words of FIQ stack */
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.space 256*4
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fiq_stack:
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