418169aff8
This reverts commit fe6aa21e9e
.
Change-Id: I8bb1e5d6c52ed1478002d2140ef494ec5d62b8e3
556 lines
26 KiB
ArmAsm
556 lines
26 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id:$
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*
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* Copyright (C) 2007-2008 by Michael Sevakis
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* Adapted for the Packard Bell Vibe 500 by Szymon Dziok
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*
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* Packard Bell Vibe 500 LCD assembly routines
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "cpu.h"
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/****************************************************************************
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* void lcd_write_yuv420_lines(unsigned char const * const src[3],
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* int width,
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* int stride);
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*
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* |R| |1.000000 -0.000001 1.402000| |Y'|
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* |G| = |1.000000 -0.334136 -0.714136| |Pb|
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* |B| |1.000000 1.772000 0.000000| |Pr|
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* Scaled, normalized, rounded and tweaked to yield RGB 565:
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* |R| |74 0 101| |Y' - 16| >> 9
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* |G| = |74 -24 -51| |Cb - 128| >> 8
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* |B| |74 128 0| |Cr - 128| >> 9
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*
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* Write four RGB565 pixels in the following order on each loop:
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* 1 3 + > down
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* 2 4 \/ left
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*/
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.section .icode, "ax", %progbits
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.align 2
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.global lcd_write_yuv420_lines
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.type lcd_write_yuv420_lines, %function
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lcd_write_yuv420_lines:
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@ r0 = yuv_src
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@ r1 = width
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@ r2 = stride
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stmfd sp!, { r4-r11, lr } @ save non-scratch
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ldmia r0, { r4, r5, r6 } @ r4 = yuv_src[0] = Y'_p
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@ r5 = yuv_src[1] = Cb_p
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@ r6 = yuv_src[2] = Cr_p
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@
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ldr r0, =LCD1_BASE @
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@
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sub r2, r2, #1 @ Adjust stride because of increment
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10: @ loop line @
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ldrb r7, [r4], #1 @ r7 = *Y'_p++;
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ldrb r8, [r5], #1 @ r8 = *Cb_p++;
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ldrb r9, [r6], #1 @ r9 = *Cr_p++;
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@
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sub r7, r7, #16 @ r7 = Y = (Y' - 16)*74
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add r12, r7, r7, asl #2 @ actually (Y' - 16)*37 and shift right
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add r7, r12, r7, asl #5 @ by one less when adding - same for all
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@
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sub r8, r8, #128 @ Cb -= 128
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sub r9, r9, #128 @ Cr -= 128
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@
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add r10, r9, r9, asl #1 @ r10 = Cr*51 + Cb*24
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add r10, r10, r10, asl #4 @
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add r10, r10, r8, asl #3 @
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add r10, r10, r8, asl #4 @
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@
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add r11, r9, r9, asl #2 @ r9 = Cr*101
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add r11, r11, r9, asl #5 @
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add r9, r11, r9, asl #6 @
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@
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add r8, r8, #2 @ r8 = bu = (Cb*128 + 128) >> 8
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mov r8, r8, asr #2 @
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add r9, r9, #256 @ r9 = rv = (r8 + 256) >> 9
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mov r9, r9, asr #9 @
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rsb r10, r10, #128 @ r10 = guv = (-r9 + 128) >> 8
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mov r10, r10, asr #8 @
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@ compute R, G, and B
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add r3, r8, r7, asr #8 @ r3 = b = (Y >> 9) + bu
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add r11, r9, r7, asr #8 @ r11 = r = (Y >> 9) + rv
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add r7, r10, r7, asr #7 @ r7 = g = (Y >> 8) + guv
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@
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orr r12, r3, r11 @ check if clamping is needed...
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orr r12, r12, r7, asr #1 @ ...at all
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cmp r12, #31 @
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bls 15f @ no clamp @
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cmp r3, #31 @ clamp b
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mvnhi r3, r3, asr #31 @
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andhi r3, r3, #31 @
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cmp r11, #31 @ clamp r
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mvnhi r11, r11, asr #31 @
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andhi r11, r11, #31 @
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cmp r7, #63 @ clamp g
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mvnhi r7, r7, asr #31 @
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andhi r7, r7, #63 @
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15: @ no clamp @
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@
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ldrb r12, [r4, r2] @ r12 = Y' = *(Y'_p + stride)
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@
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orr r3, r3, r11, lsl #11 @ r3 = b | (r << 11)
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orr r3, r3, r7, lsl #5 @ r3 |= (g << 5)
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@
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movs r7, r3, lsr #8 @ store pixel
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20: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 20b @
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str r7, [r0, #0x10] @
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25: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 25b @
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str r3, [r0, #0x10] @
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@
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sub r7, r12, #16 @ r7 = Y = (Y' - 16)*74
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add r12, r7, r7, asl #2 @
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add r7, r12, r7, asl #5 @
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@ compute R, G, and B
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add r3, r8, r7, asr #8 @ r3 = b = (Y >> 9) + bu
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add r11, r9, r7, asr #8 @ r11 = r = (Y >> 9) + rv
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add r7, r10, r7, asr #7 @ r7 = g = (Y >> 8) + guv
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@
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orr r12, r3, r11 @ check if clamping is needed...
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orr r12, r12, r7, asr #1 @ ...at all
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cmp r12, #31 @
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bls 15f @ no clamp @
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cmp r3, #31 @ clamp b
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mvnhi r3, r3, asr #31 @
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andhi r3, r3, #31 @
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cmp r11, #31 @ clamp r
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mvnhi r11, r11, asr #31 @
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andhi r11, r11, #31 @
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cmp r7, #63 @ clamp g
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mvnhi r7, r7, asr #31 @
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andhi r7, r7, #63 @
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15: @ no clamp @
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@
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ldrb r12, [r4], #1 @ r12 = Y' = *(Y'_p++)
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@
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orr r3, r3, r11, lsl #11 @ r3 = b | (r << 11)
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orr r3, r3, r7, lsl #5 @ r3 |= (g << 5)
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@
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movs r7, r3, lsr #8 @ store pixel
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20: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 20b @
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str r7, [r0, #0x10] @
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25: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 25b @
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str r3, [r0, #0x10] @
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@
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sub r7, r12, #16 @ r7 = Y = (Y' - 16)*74
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add r12, r7, r7, asl #2 @
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add r7, r12, r7, asl #5 @
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@ compute R, G, and B
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add r3, r8, r7, asr #8 @ r3 = b = (Y >> 9) + bu
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add r11, r9, r7, asr #8 @ r11 = r = (Y >> 9) + rv
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add r7, r10, r7, asr #7 @ r7 = g = (Y >> 8) + guv
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@
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orr r12, r3, r11 @ check if clamping is needed...
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orr r12, r12, r7, asr #1 @ ...at all
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cmp r12, #31 @
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bls 15f @ no clamp @
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cmp r3, #31 @ clamp b
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mvnhi r3, r3, asr #31 @
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andhi r3, r3, #31 @
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cmp r11, #31 @ clamp r
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mvnhi r11, r11, asr #31 @
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andhi r11, r11, #31 @
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cmp r7, #63 @ clamp g
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mvnhi r7, r7, asr #31 @
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andhi r7, r7, #63 @
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15: @ no clamp @
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@
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ldrb r12, [r4, r2] @ r12 = Y' = *(Y'_p + stride)
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@
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orr r3, r3, r7, lsl #5 @ r3 = b | (g << 5)
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orr r3, r3, r11, lsl #11 @ r3 |= (r << 11)
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@
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movs r7, r3, lsr #8 @ store pixel
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20: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 20b @
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str r7, [r0, #0x10] @
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25: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 25b @
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str r3, [r0, #0x10] @
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@
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sub r7, r12, #16 @ r7 = Y = (Y' - 16)*74
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add r12, r7, r7, asl #2 @
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add r7, r12, r7, asl #5 @
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@ compute R, G, and B
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add r3, r8, r7, asr #8 @ r3 = b = (Y >> 9) + bu
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add r11, r9, r7, asr #8 @ r11 = r = (Y >> 9) + rv
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add r7, r10, r7, asr #7 @ r7 = g = (Y >> 8) + guv
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@
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orr r12, r3, r11 @ check if clamping is needed...
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orr r12, r12, r7, asr #1 @ ...at all
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cmp r12, #31 @
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bls 15f @ no clamp @
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cmp r3, #31 @ clamp b
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mvnhi r3, r3, asr #31 @
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andhi r3, r3, #31 @
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cmp r11, #31 @ clamp r
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mvnhi r11, r11, asr #31 @
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andhi r11, r11, #31 @
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cmp r7, #63 @ clamp g
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mvnhi r7, r7, asr #31 @
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andhi r7, r7, #63 @
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15: @ no clamp @
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@
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orr r3, r3, r11, lsl #11 @ r3 = b | (r << 11)
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orr r3, r3, r7, lsl #5 @ r3 |= (g << 5)
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@
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movs r7, r3, lsr #8 @ store pixel
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20: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 20b @
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str r7, [r0, #0x10] @
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25: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 25b @
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str r3, [r0, #0x10] @
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@
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subs r1, r1, #2 @ subtract block from width
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bgt 10b @ loop line @
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@
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ldmpc regs=r4-r11 @ restore registers and return
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.ltorg @ dump constant pool
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.size lcd_write_yuv420_lines, .-lcd_write_yuv420_lines
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/****************************************************************************
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* void lcd_write_yuv420_lines_odither(unsigned char const * const src[3],
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* int width,
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* int stride,
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* int x_screen,
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* int y_screen);
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*
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* |R| |1.000000 -0.000001 1.402000| |Y'|
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* |G| = |1.000000 -0.334136 -0.714136| |Pb|
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* |B| |1.000000 1.772000 0.000000| |Pr|
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* Red scaled at twice g & b but at same precision to place it in correct
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* bit position after multiply and leave instruction count lower.
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* |R| |258 0 408| |Y' - 16|
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* |G| = |149 -49 -104| |Cb - 128|
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* |B| |149 258 0| |Cr - 128|
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*
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* Write four RGB565 pixels in the following order on each loop:
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* 1 3 + > down
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* 2 4 \/ left
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*
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* Kernel pattern (raw|use order):
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* 5 3 4 2 row0 row2 > down
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* 1 7 0 6 | 5 1 3 7 4 0 2 6 col0 left
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* 4 2 5 3 | 4 0 2 6 5 1 3 7 col2 \/
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* 0 6 1 7
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*/
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.section .icode, "ax", %progbits
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.align 2
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.global lcd_write_yuv420_lines_odither
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.type lcd_write_yuv420_lines_odither, %function
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lcd_write_yuv420_lines_odither:
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@ r0 = yuv_src
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@ r1 = width
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@ r2 = stride
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@ r3 = x_screen
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@ [sp] = y_screen
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stmfd sp!, { r4-r11, lr } @ save non-scratch
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ldmia r0, { r4, r5, r6 } @ r4 = yuv_src[0] = Y'_p
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@ r5 = yuv_src[1] = Cb_p
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@ r6 = yuv_src[2] = Cr_p
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@
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ldr r0, [sp, #36] @ Line up pattern and kernel quadrant
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eor r14, r3, r0 @
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and r14, r14, #0x2 @
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mov r14, r14, lsl #6 @ 0x00 or 0x80
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@
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ldr r0, =LCD1_BASE @
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@
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sub r2, r2, #1 @ Adjust stride because of increment
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10: @ loop line @
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@
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ldrb r7, [r4], #1 @ r7 = *Y'_p++;
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ldrb r8, [r5], #1 @ r8 = *Cb_p++;
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ldrb r9, [r6], #1 @ r9 = *Cr_p++;
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@
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eor r14, r14, #0x80 @ flip pattern quadrant
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@
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sub r7, r7, #16 @ r7 = Y = (Y' - 16)*149
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add r12, r7, r7, asl #2 @
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add r12, r12, r12, asl #4 @
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add r7, r12, r7, asl #6 @
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@
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sub r8, r8, #128 @ Cb -= 128
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sub r9, r9, #128 @ Cr -= 128
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@
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add r10, r8, r8, asl #4 @ r10 = guv = Cr*104 + Cb*49
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add r10, r10, r8, asl #5 @
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add r10, r10, r9, asl #3 @
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add r10, r10, r9, asl #5 @
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add r10, r10, r9, asl #6 @
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@
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mov r8, r8, asl #1 @ r8 = bu = Cb*258
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add r8, r8, r8, asl #7 @
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@
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add r9, r9, r9, asl #1 @ r9 = rv = Cr*408
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add r9, r9, r9, asl #4 @
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mov r9, r9, asl #3 @
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@
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@ compute R, G, and B
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add r3, r8, r7 @ r3 = b' = Y + bu
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add r11, r9, r7, asl #1 @ r11 = r' = Y*2 + rv
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rsb r7, r10, r7 @ r7 = g' = Y + guv
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@
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@ r8 = bu, r9 = rv, r10 = guv
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@
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sub r12, r3, r3, lsr #5 @ r3 = 31/32*b + b/256
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add r3, r12, r3, lsr #8 @
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@
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sub r12, r11, r11, lsr #5 @ r11 = 31/32*r + r/256
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add r11, r12, r11, lsr #8 @
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@
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sub r12, r7, r7, lsr #6 @ r7 = 63/64*g + g/256
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add r7, r12, r7, lsr #8 @
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@
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add r12, r14, #0x200 @
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@
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add r3, r3, r12 @ b = r3 + delta
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add r11, r11, r12, lsl #1 @ r = r11 + delta*2
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add r7, r7, r12, lsr #1 @ g = r7 + delta/2
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@
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orr r12, r3, r11, asr #1 @ check if clamping is needed...
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orr r12, r12, r7 @ ...at all
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movs r12, r12, asr #15 @
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beq 15f @ no clamp @
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movs r12, r3, asr #15 @ clamp b
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mvnne r3, r12, lsr #15 @
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andne r3, r3, #0x7c00 @ mask b only if clamped
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movs r12, r11, asr #16 @ clamp r
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mvnne r11, r12, lsr #16 @
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movs r12, r7, asr #15 @ clamp g
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mvnne r7, r12, lsr #15 @
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15: @ no clamp @
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@
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ldrb r12, [r4, r2] @ r12 = Y' = *(Y'_p + stride)
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@
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and r11, r11, #0xf800 @ pack pixel
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and r7, r7, #0x7e00 @ r3 = pixel = (r & 0xf800) |
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orr r11, r11, r7, lsr #4 @ ((g & 0x7e00) >> 4) |
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orr r3, r11, r3, lsr #10 @ (b >> 10)
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@
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movs r7, r3, lsr #8 @ store pixel
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20: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 20b @
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str r7, [r0, #0x10] @
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25: @
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ldr r11, [r0] @
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tst r11, #LCD1_BUSY_MASK @
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bne 25b @
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str r3, [r0, #0x10] @
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@
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sub r7, r12, #16 @ r7 = Y = (Y' - 16)*149
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add r12, r7, r7, asl #2 @
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add r12, r12, r12, asl #4 @
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add r7, r12, r7, asl #6 @
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@ compute R, G, and B
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add r3, r8, r7 @ r3 = b' = Y + bu
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add r11, r9, r7, asl #1 @ r11 = r' = Y*2 + rv
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rsb r7, r10, r7 @ r7 = g' = Y + guv
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@
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sub r12, r3, r3, lsr #5 @ r3 = 31/32*b' + b'/256
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add r3, r12, r3, lsr #8 @
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@
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sub r12, r11, r11, lsr #5 @ r11 = 31/32*r' + r'/256
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add r11, r12, r11, lsr #8 @
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@
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sub r12, r7, r7, lsr #6 @ r7 = 63/64*g' + g'/256
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add r7, r12, r7, lsr #8 @
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@
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@ This element is zero - use r14 @
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@
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add r3, r3, r14 @ b = r3 + delta
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add r11, r11, r14, lsl #1 @ r = r11 + delta*2
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add r7, r7, r14, lsr #1 @ g = r7 + delta/2
|
|
@
|
|
orr r12, r3, r11, asr #1 @ check if clamping is needed...
|
|
orr r12, r12, r7 @ ...at all
|
|
movs r12, r12, asr #15 @
|
|
beq 15f @ no clamp @
|
|
movs r12, r3, asr #15 @ clamp b
|
|
mvnne r3, r12, lsr #15 @
|
|
andne r3, r3, #0x7c00 @ mask b only if clamped
|
|
movs r12, r11, asr #16 @ clamp r
|
|
mvnne r11, r12, lsr #16 @
|
|
movs r12, r7, asr #15 @ clamp g
|
|
mvnne r7, r12, lsr #15 @
|
|
15: @ no clamp @
|
|
@
|
|
ldrb r12, [r4], #1 @ r12 = Y' = *(Y'_p++)
|
|
@
|
|
and r11, r11, #0xf800 @ pack pixel
|
|
and r7, r7, #0x7e00 @ r3 = pixel = (r & 0xf800) |
|
|
orr r11, r11, r7, lsr #4 @ ((g & 0x7e00) >> 4) |
|
|
orr r3, r11, r3, lsr #10 @ (b >> 10)
|
|
@
|
|
movs r7, r3, lsr #8 @ store pixel
|
|
20: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 20b @
|
|
str r7, [r0, #0x10] @
|
|
25: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 25b @
|
|
str r3, [r0, #0x10] @
|
|
@
|
|
sub r7, r12, #16 @ r7 = Y = (Y' - 16)*149
|
|
add r12, r7, r7, asl #2 @
|
|
add r12, r12, r12, asl #4 @
|
|
add r7, r12, r7, asl #6 @
|
|
@ compute R, G, and B
|
|
add r3, r8, r7 @ r3 = b' = Y + bu
|
|
add r11, r9, r7, asl #1 @ r11 = r' = Y*2 + rv
|
|
rsb r7, r10, r7 @ r7 = g' = Y + guv
|
|
@
|
|
@ r8 = bu, r9 = rv, r10 = guv
|
|
@
|
|
sub r12, r3, r3, lsr #5 @ r3 = 31/32*b' + b'/256
|
|
add r3, r12, r3, lsr #8 @
|
|
@
|
|
sub r12, r11, r11, lsr #5 @ r11 = 31/32*r' + r'/256
|
|
add r11, r12, r11, lsr #8 @
|
|
@
|
|
sub r12, r7, r7, lsr #6 @ r7 = 63/64*g' + g'/256
|
|
add r7, r12, r7, lsr #8 @
|
|
@
|
|
add r12, r14, #0x100 @
|
|
@
|
|
add r3, r3, r12 @ b = r3 + delta
|
|
add r11, r11, r12, lsl #1 @ r = r11 + delta*2
|
|
add r7, r7, r12, lsr #1 @ g = r7 + delta/2
|
|
@
|
|
orr r12, r3, r11, asr #1 @ check if clamping is needed...
|
|
orr r12, r12, r7 @ ...at all
|
|
movs r12, r12, asr #15 @
|
|
beq 15f @ no clamp @
|
|
movs r12, r3, asr #15 @ clamp b
|
|
mvnne r3, r12, lsr #15 @
|
|
andne r3, r3, #0x7c00 @ mask b only if clamped
|
|
movs r12, r11, asr #16 @ clamp r
|
|
mvnne r11, r12, lsr #16 @
|
|
movs r12, r7, asr #15 @ clamp g
|
|
mvnne r7, r12, lsr #15 @
|
|
15: @ no clamp @
|
|
@
|
|
ldrb r12, [r4, r2] @ r12 = Y' = *(Y'_p + stride)
|
|
@
|
|
and r11, r11, #0xf800 @ pack pixel
|
|
and r7, r7, #0x7e00 @ r3 = pixel = (r & 0xf800) |
|
|
orr r11, r11, r7, lsr #4 @ ((g & 0x7e00) >> 4) |
|
|
orr r3, r11, r3, lsr #10 @ (b >> 10)
|
|
@
|
|
movs r7, r3, lsr #8 @ store pixel
|
|
20: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 20b @
|
|
str r7, [r0, #0x10] @
|
|
25: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 25b @
|
|
str r3, [r0, #0x10] @
|
|
@
|
|
sub r7, r12, #16 @ r7 = Y = (Y' - 16)*149
|
|
add r12, r7, r7, asl #2 @
|
|
add r12, r12, r12, asl #4 @
|
|
add r7, r12, r7, asl #6 @
|
|
@ compute R, G, and B
|
|
add r3, r8, r7 @ r3 = b' = Y + bu
|
|
add r11, r9, r7, asl #1 @ r11 = r' = Y*2 + rv
|
|
rsb r7, r10, r7 @ r7 = g' = Y + guv
|
|
@
|
|
sub r12, r3, r3, lsr #5 @ r3 = 31/32*b + b/256
|
|
add r3, r12, r3, lsr #8 @
|
|
@
|
|
sub r12, r11, r11, lsr #5 @ r11 = 31/32*r + r/256
|
|
add r11, r12, r11, lsr #8 @
|
|
@
|
|
sub r12, r7, r7, lsr #6 @ r7 = 63/64*g + g/256
|
|
add r7, r12, r7, lsr #8 @
|
|
@
|
|
add r12, r14, #0x300 @
|
|
@
|
|
add r3, r3, r12 @ b = r3 + delta
|
|
add r11, r11, r12, lsl #1 @ r = r11 + delta*2
|
|
add r7, r7, r12, lsr #1 @ g = r7 + delta/2
|
|
@
|
|
orr r12, r3, r11, asr #1 @ check if clamping is needed...
|
|
orr r12, r12, r7 @ ...at all
|
|
movs r12, r12, asr #15 @
|
|
beq 15f @ no clamp @
|
|
movs r12, r3, asr #15 @ clamp b
|
|
mvnne r3, r12, lsr #15 @
|
|
andne r3, r3, #0x7c00 @ mask b only if clamped
|
|
movs r12, r11, asr #16 @ clamp r
|
|
mvnne r11, r12, lsr #16 @
|
|
movs r12, r7, asr #15 @ clamp g
|
|
mvnne r7, r12, lsr #15 @
|
|
15: @ no clamp @
|
|
@
|
|
and r11, r11, #0xf800 @ pack pixel
|
|
and r7, r7, #0x7e00 @ r3 = pixel = (r & 0xf800) |
|
|
orr r11, r11, r7, lsr #4 @ ((g & 0x7e00) >> 4) |
|
|
orr r3, r11, r3, lsr #10 @ (b >> 10)
|
|
@
|
|
movs r7, r3, lsr #8 @ store pixel
|
|
20: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 20b @
|
|
str r7, [r0, #0x10] @
|
|
25: @
|
|
ldr r11, [r0] @
|
|
tst r11, #LCD1_BUSY_MASK @
|
|
bne 25b @
|
|
str r3, [r0, #0x10] @
|
|
@
|
|
subs r1, r1, #2 @ subtract block from width
|
|
bgt 10b @ loop line @
|
|
@
|
|
ldmpc regs=r4-r11 @ restore registers and return
|
|
.ltorg @ dump constant pool
|
|
.size lcd_write_yuv420_lines_odither, .-lcd_write_yuv420_lines_odither
|