47cfed1f1b
- using the existing wm8751 driver (from gigabeat port) integrated into the portal player environment - only 44.1kHz at the moment - for some reason the output is very quiet - due to the lack of usable buttons the easiest (?) way to start an audio file is to copy the .playlist_control, config.cfg and nvram.bin files from another target, where auto resume is enabled. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@16117 a1c6a512-1295-4272-9138-f99709370657
114 lines
3.1 KiB
C
114 lines
3.1 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Portalplayer specific code for Wolfson audio codecs
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*
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* Based on code from the ipodlinux project - http://ipodlinux.org/
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* Adapted for Rockbox in December 2005
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*
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* Original file: linux/arch/armnommu/mach-ipod/audio.c
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*
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* Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org)
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*
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* All files in this archive are subject to the GNU General Public License.
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* See the file COPYING in the source tree root for full license agreement.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "audiohw.h"
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#include "i2c-pp.h"
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#if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(MROBE_100)
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/* The H10's audio codec uses an I2C address of 0x1b */
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#define I2C_AUDIO_ADDRESS 0x1b
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#else
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/* The iPod's audio codecs use an I2C address of 0x1a */
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#define I2C_AUDIO_ADDRESS 0x1a
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#endif
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/*
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* Initialise the PP I2C and I2S.
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*/
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void audiohw_init(void) {
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/* reset I2C */
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i2c_init();
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#ifdef CPU_PP502x
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/* normal outputs for CDI and I2S pin groups */
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DEV_INIT2 &= ~0x300;
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/*mini2?*/
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DEV_INIT1 &=~0x3000000;
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/*mini2?*/
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/* device reset */
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DEV_RS |= DEV_I2S;
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DEV_RS &=~DEV_I2S;
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/* device enable */
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DEV_EN |= (DEV_I2S | 0x7);
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/* enable external dev clock clocks */
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DEV_EN |= 0x2;
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/* external dev clock to 24MHz */
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outl(inl(0x70000018) & ~0xc, 0x70000018);
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#else
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/* device reset */
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outl(inl(0xcf005030) | 0x80, 0xcf005030);
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outl(inl(0xcf005030) & ~0x80, 0xcf005030);
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/* device enable */
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outl(inl(0xcf005000) | 0x80, 0xcf005000);
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/* GPIO D06 enable for output */
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outl(inl(0xcf00000c) | 0x40, 0xcf00000c);
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outl(inl(0xcf00001c) & ~0x40, 0xcf00001c);
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#ifdef IPOD_1G2G
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/* bits 11,10 == 10 */
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outl(inl(0xcf004040) & ~0x400, 0xcf004040);
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outl(inl(0xcf004040) | 0x800, 0xcf004040);
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#else /* IPOD_3G */
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/* bits 11,10 == 01 */
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outl(inl(0xcf004040) | 0x400, 0xcf004040);
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outl(inl(0xcf004040) & ~0x800, 0xcf004040);
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outl(inl(0xcf004048) & ~0x1, 0xcf004048);
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outl(inl(0xcf000004) & ~0xf, 0xcf000004);
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outl(inl(0xcf004044) & ~0xf, 0xcf004044);
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/* C03 = 0 */
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outl(inl(0xcf000008) | 0x8, 0xcf000008);
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outl(inl(0xcf000018) | 0x8, 0xcf000018);
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outl(inl(0xcf000028) & ~0x8, 0xcf000028);
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#endif /* IPOD_1G2G/3G */
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#endif
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#if defined(HAVE_WM8731) || defined(HAVE_WM8751)
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audiohw_preinit();
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#endif
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}
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#if !defined(HAVE_WM8731) && !defined(HAVE_WM8751)
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void audiohw_postinit(void)
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{
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}
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#endif
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void wmcodec_write(int reg, int data)
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{
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pp_i2c_send(I2C_AUDIO_ADDRESS, (reg<<1) | ((data&0x100)>>8),data&0xff);
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}
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