1487 lines
37 KiB
C
1487 lines
37 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2002 by Alan Korr
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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//#define LOGF_ENABLE
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#include <stdbool.h>
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#include <inttypes.h>
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#include "led.h"
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#include "cpu.h"
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#include "system.h"
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#include "debug.h"
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#include "panic.h"
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#include "power.h"
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#include "string.h"
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#include "ata-driver.h"
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#include "ata-defines.h"
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#include "fs_defines.h"
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#include "storage.h"
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#include "logf.h"
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#define SELECT_DEVICE1 0x10
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#define SELECT_LBA 0x40
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#define CONTROL_nIEN 0x02
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#define CONTROL_SRST 0x04
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#define CMD_READ_SECTORS 0x20
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#define CMD_WRITE_SECTORS 0x30
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#define CMD_WRITE_SECTORS_EXT 0x34
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#define CMD_READ_MULTIPLE 0xC4
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#define CMD_READ_MULTIPLE_EXT 0x29
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#define CMD_WRITE_MULTIPLE 0xC5
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#define CMD_WRITE_MULTIPLE_EXT 0x39
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#define CMD_SET_MULTIPLE_MODE 0xC6
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#ifdef HAVE_ATA_SMART
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#define CMD_SMART 0xB0
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#endif
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#define CMD_STANDBY_IMMEDIATE 0xE0
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#define CMD_STANDBY 0xE2
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#define CMD_IDENTIFY 0xEC
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#define CMD_SLEEP 0xE6
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#define CMD_FLUSH_CACHE 0xE7
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#define CMD_SET_FEATURES 0xEF
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#define CMD_SECURITY_FREEZE_LOCK 0xF5
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#ifdef HAVE_ATA_DMA
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#define CMD_READ_DMA 0xC8
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#define CMD_READ_DMA_EXT 0x25
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#define CMD_WRITE_DMA 0xCA
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#define CMD_WRITE_DMA_EXT 0x35
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#endif
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#define READWRITE_TIMEOUT 5*HZ
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#ifdef HAVE_ATA_POWER_OFF
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#define ATA_POWER_OFF_TIMEOUT 2*HZ
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#endif
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#if defined(HAVE_USBSTACK)
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#define ATA_ACTIVE_IN_USB 1
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#else
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#define ATA_ACTIVE_IN_USB 0
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#endif
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enum {
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ATA_BOOT = -1,
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ATA_OFF,
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ATA_SLEEPING,
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ATA_SPINUP,
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ATA_ON,
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};
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static int ata_state = ATA_BOOT;
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static struct mutex ata_mtx SHAREDBSS_ATTR;
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static int ata_device; /* device 0 (master) or 1 (slave) */
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static int spinup_time = 0;
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#if (CONFIG_LED == LED_REAL)
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static bool ata_led_enabled = true;
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static bool ata_led_on = false;
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#endif
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static long sleep_timeout = 5*HZ;
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#ifdef HAVE_LBA48
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static bool lba48 = false; /* set for 48 bit addressing */
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#endif
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static long last_disk_activity = -1;
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#ifdef HAVE_ATA_POWER_OFF
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static long power_off_tick;
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#endif
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static unsigned long total_sectors;
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static int multisectors; /* number of supported multisectors */
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static unsigned short identify_info[SECTOR_SIZE/2];
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#ifdef MAX_PHYS_SECTOR_SIZE
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struct sector_cache_entry {
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bool inuse;
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unsigned long sectornum; /* logical sector */
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unsigned char data[MAX_PHYS_SECTOR_SIZE];
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};
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/* buffer for reading and writing large physical sectors */
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#define NUMCACHES 2
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static struct sector_cache_entry sector_cache;
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static int phys_sector_mult = 1;
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#endif
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#ifdef HAVE_ATA_DMA
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static int dma_mode = 0;
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#endif
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#ifdef HAVE_ATA_POWER_OFF
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static int ata_power_on(void);
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#endif
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static int perform_soft_reset(void);
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static int set_multiple_mode(int sectors);
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static int set_features(void);
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static inline void keep_ata_active(void)
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{
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last_disk_activity = current_tick;
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}
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static inline void schedule_ata_sleep(long from_now)
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{
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last_disk_activity = current_tick - sleep_timeout + from_now;
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}
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static inline bool ata_sleep_timed_out(void)
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{
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return sleep_timeout &&
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TIME_AFTER(current_tick, last_disk_activity + sleep_timeout);
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}
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static inline void schedule_ata_power_off(void)
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{
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#ifdef HAVE_ATA_POWER_OFF
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power_off_tick = current_tick + ATA_POWER_OFF_TIMEOUT;
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#endif
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}
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static inline bool ata_power_off_timed_out(void)
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{
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#ifdef HAVE_ATA_POWER_OFF
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return TIME_AFTER(current_tick, power_off_tick);
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#else
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return false;
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#endif
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}
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#ifndef ATA_TARGET_POLLING
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static ICODE_ATTR int wait_for_bsy(void)
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{
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long timeout = current_tick + HZ*30;
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do
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{
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if (!(ATA_IN8(ATA_STATUS) & STATUS_BSY))
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return 1;
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keep_ata_active();
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yield();
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} while (TIME_BEFORE(current_tick, timeout));
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return 0; /* timeout */
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}
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static ICODE_ATTR int wait_for_rdy(void)
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{
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long timeout;
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if (!wait_for_bsy())
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return 0;
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timeout = current_tick + HZ*10;
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do
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{
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if (ATA_IN8(ATA_ALT_STATUS) & STATUS_RDY)
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return 1;
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keep_ata_active();
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yield();
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} while (TIME_BEFORE(current_tick, timeout));
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return 0; /* timeout */
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}
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#else
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#define wait_for_bsy ata_wait_for_bsy
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#define wait_for_rdy ata_wait_for_rdy
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#endif
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static int ata_perform_wakeup(int state)
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{
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logf("ata WAKE %ld", current_tick);
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if (state > ATA_OFF) {
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if (perform_soft_reset()) {
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return -1;
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}
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}
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#ifdef HAVE_ATA_POWER_OFF
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else {
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if (ata_power_on()) {
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return -2;
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}
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}
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#endif
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return 0;
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}
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static int ata_perform_sleep(void)
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{
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logf("ata SLEEP %ld", current_tick);
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ATA_OUT8(ATA_SELECT, ata_device);
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if(!wait_for_rdy()) {
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DEBUGF("ata_perform_sleep() - not RDY\n");
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return -1;
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}
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/* STANDBY IMMEDIATE
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- writes all cached data
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- transitions to PM2:Standby
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- enters Standby_z power condition
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This places the device into a state where power-off is safe, but
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it is not the lowest-theoretical power state -- that is SLEEP, but
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that is bugged on some SSDs (FC1307A-based).
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TODO: Is there a practical downside to using STANDBY_IMMEDIATE instead
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of SLEEP, assuming the former spins down the drive?
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*/
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if (ata_disk_isssd()) {
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ATA_OUT8(ATA_COMMAND, CMD_STANDBY_IMMEDIATE);
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} else {
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ATA_OUT8(ATA_COMMAND, CMD_SLEEP);
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}
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if (!wait_for_rdy()) {
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DEBUGF("ata_perform_sleep() - CMD failed\n");
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return -2;
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}
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return 0;
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}
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static int ata_perform_flush_cache(void)
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{
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/* Don't issue the flush cache command if the device
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doesn't support it, even though it's mandatory.
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*/
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if (!(identify_info[83] & (1 << 12)))
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return 0;
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logf("ata FLUSH CACHE %ld", current_tick);
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ATA_OUT8(ATA_SELECT, ata_device);
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if(!wait_for_rdy()) {
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DEBUGF("ata_perform_flush_cache() - not RDY\n");
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return -1;
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}
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ATA_OUT8(ATA_COMMAND, CMD_FLUSH_CACHE);
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if (!wait_for_rdy()) {
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DEBUGF("ata_perform_flush_cache() - CMD failed\n");
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return -2;
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}
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return 0;
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}
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static ICODE_ATTR int wait_for_start_of_transfer(void)
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{
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if (!wait_for_bsy())
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return 0;
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return (ATA_IN8(ATA_ALT_STATUS) & (STATUS_BSY|STATUS_DRQ)) == STATUS_DRQ;
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}
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static ICODE_ATTR int wait_for_end_of_transfer(void)
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{
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if (!wait_for_bsy())
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return 0;
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return (ATA_IN8(ATA_ALT_STATUS) &
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(STATUS_BSY|STATUS_RDY|STATUS_DF|STATUS_DRQ|STATUS_ERR))
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== STATUS_RDY;
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}
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#if (CONFIG_LED == LED_REAL)
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/* Conditionally block LED access for the ATA driver, so the LED can be
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* (mis)used for other purposes */
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static void ata_led(bool on)
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{
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ata_led_on = on;
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if (ata_led_enabled)
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led(ata_led_on);
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}
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#else
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#define ata_led(on) led(on)
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#endif
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#ifndef ATA_OPTIMIZED_READING
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static ICODE_ATTR void copy_read_sectors(unsigned char* buf, int wordcount)
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{
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unsigned short tmp = 0;
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if ( (unsigned long)buf & 1)
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{ /* not 16-bit aligned, copy byte by byte */
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unsigned char* bufend = buf + wordcount*2;
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do
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{
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tmp = ATA_IN16(ATA_DATA);
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#if defined(ROCKBOX_LITTLE_ENDIAN)
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*buf++ = tmp & 0xff; /* I assume big endian */
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*buf++ = tmp >> 8; /* and don't use the SWAB16 macro */
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#else
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*buf++ = tmp >> 8;
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*buf++ = tmp & 0xff;
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#endif
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} while (buf < bufend); /* tail loop is faster */
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}
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else
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{ /* 16-bit aligned, can do faster copy */
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unsigned short* wbuf = (unsigned short*)buf;
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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*wbuf = ATA_IN16(ATA_DATA);
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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#endif /* !ATA_OPTIMIZED_READING */
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#ifndef ATA_OPTIMIZED_WRITING
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static ICODE_ATTR void copy_write_sectors(const unsigned char* buf,
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int wordcount)
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{
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if ( (unsigned long)buf & 1)
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{ /* not 16-bit aligned, copy byte by byte */
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unsigned short tmp = 0;
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const unsigned char* bufend = buf + wordcount*2;
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do
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{
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#if defined(ROCKBOX_LITTLE_ENDIAN)
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tmp = (unsigned short) *buf++;
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tmp |= (unsigned short) *buf++ << 8;
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#else
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tmp = (unsigned short) *buf++ << 8;
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tmp |= (unsigned short) *buf++;
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#endif
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ATA_OUT16(ATA_DATA, tmp);
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} while (buf < bufend); /* tail loop is faster */
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}
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else
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{ /* 16-bit aligned, can do faster copy */
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unsigned short* wbuf = (unsigned short*)buf;
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unsigned short* wbufend = wbuf + wordcount;
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do
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{
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ATA_OUT16(ATA_DATA, *wbuf);
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} while (++wbuf < wbufend); /* tail loop is faster */
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}
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}
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#endif /* !ATA_OPTIMIZED_WRITING */
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int ata_disk_isssd(void)
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{
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/*
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offset 217 is "Nominal Rotation rate"
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0x0000 == Not reported
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0x0001 == Solid State
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0x0401 -> 0xffe == RPM
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All others reserved
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Some CF cards return 0x0100 (ie byteswapped 0x0001) so accept either.
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However, this is a very recent change, and we can't rely on it,
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especially for the FC1307A CF->SD adapters.
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So we have to resort to other heuristics.
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offset 83 b2 is set to show device implementes CFA commands
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offset 0 is 0x848a for CF, but that's not guaranteed, because reasons.
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These don't guarantee this is an SSD but it's better than nothing.
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*/
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return (identify_info[83] & (1<<2) ||
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identify_info[217] == 0x0001 || identify_info[217] == 0x0100);
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}
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static int ata_transfer_sectors(unsigned long start,
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int incount,
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void* inbuf,
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int write)
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{
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int ret = 0;
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long timeout;
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int count;
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void* buf;
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long spinup_start = spinup_start;
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#ifdef HAVE_ATA_DMA
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bool usedma = false;
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#endif
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if (start + incount > total_sectors) {
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ret = -1;
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goto error;
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}
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keep_ata_active();
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ata_led(true);
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if (ata_state < ATA_ON) {
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spinup_start = current_tick;
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int state = ata_state;
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ata_state = ATA_SPINUP;
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if (ata_perform_wakeup(state)) {
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ret = -2;
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goto error;
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}
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}
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timeout = current_tick + READWRITE_TIMEOUT;
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ATA_OUT8(ATA_SELECT, ata_device);
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if (!wait_for_rdy())
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{
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ret = -3;
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goto error;
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}
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retry:
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buf = inbuf;
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count = incount;
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while (TIME_BEFORE(current_tick, timeout)) {
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ret = 0;
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keep_ata_active();
|
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|
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#ifdef HAVE_ATA_DMA
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/* If DMA is supported and parameters are ok for DMA, use it */
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if (dma_mode && ata_dma_setup(inbuf, incount * SECTOR_SIZE, write))
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usedma = true;
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#endif
|
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|
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#ifdef HAVE_LBA48
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if (lba48)
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{
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ATA_OUT8(ATA_NSECTOR, count >> 8);
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ATA_OUT8(ATA_NSECTOR, count & 0xff);
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ATA_OUT8(ATA_SECTOR, (start >> 24) & 0xff); /* 31:24 */
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ATA_OUT8(ATA_SECTOR, start & 0xff); /* 7:0 */
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ATA_OUT8(ATA_LCYL, 0); /* 39:32 */
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ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff); /* 15:8 */
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ATA_OUT8(ATA_HCYL, 0); /* 47:40 */
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ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff); /* 23:16 */
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ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
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if (write)
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA_EXT : CMD_WRITE_MULTIPLE_EXT);
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else
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA_EXT : CMD_READ_MULTIPLE_EXT);
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#else
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ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE_EXT : CMD_READ_MULTIPLE_EXT);
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#endif
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}
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else
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#endif
|
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{
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ATA_OUT8(ATA_NSECTOR, count & 0xff); /* 0 means 256 sectors */
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ATA_OUT8(ATA_SECTOR, start & 0xff);
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ATA_OUT8(ATA_LCYL, (start >> 8) & 0xff);
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ATA_OUT8(ATA_HCYL, (start >> 16) & 0xff);
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ATA_OUT8(ATA_SELECT, ((start >> 24) & 0xf) | SELECT_LBA | ata_device);
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#ifdef HAVE_ATA_DMA
|
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if (write)
|
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_WRITE_DMA : CMD_WRITE_MULTIPLE);
|
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else
|
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ATA_OUT8(ATA_COMMAND, usedma ? CMD_READ_DMA : CMD_READ_MULTIPLE);
|
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#else
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ATA_OUT8(ATA_COMMAND, write ? CMD_WRITE_MULTIPLE : CMD_READ_MULTIPLE);
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#endif
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}
|
|
|
|
/* wait at least 400ns between writing command and reading status */
|
|
__asm__ volatile ("nop");
|
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__asm__ volatile ("nop");
|
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__asm__ volatile ("nop");
|
|
__asm__ volatile ("nop");
|
|
__asm__ volatile ("nop");
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
if (usedma) {
|
|
if (!ata_dma_finish())
|
|
ret = -7;
|
|
|
|
if (ret != 0) {
|
|
perform_soft_reset();
|
|
goto retry;
|
|
}
|
|
|
|
if (ata_state == ATA_SPINUP) {
|
|
ata_state = ATA_ON;
|
|
spinup_time = current_tick - spinup_start;
|
|
}
|
|
}
|
|
else
|
|
#endif /* HAVE_ATA_DMA */
|
|
{
|
|
while (count) {
|
|
int sectors;
|
|
int wordcount;
|
|
int status;
|
|
int error;
|
|
|
|
if (!wait_for_start_of_transfer()) {
|
|
/* We have timed out waiting for RDY and/or DRQ, possibly
|
|
because the hard drive is shaking and has problems
|
|
reading the data. We have two options:
|
|
1) Wait some more
|
|
2) Perform a soft reset and try again.
|
|
|
|
We choose alternative 2.
|
|
*/
|
|
perform_soft_reset();
|
|
ret = -5;
|
|
goto retry;
|
|
}
|
|
|
|
if (ata_state == ATA_SPINUP) {
|
|
ata_state = ATA_ON;
|
|
spinup_time = current_tick - spinup_start;
|
|
}
|
|
|
|
/* read the status register exactly once per loop */
|
|
status = ATA_IN8(ATA_STATUS);
|
|
error = ATA_IN8(ATA_ERROR);
|
|
|
|
if (count >= multisectors)
|
|
sectors = multisectors;
|
|
else
|
|
sectors = count;
|
|
|
|
wordcount = sectors * SECTOR_SIZE / 2;
|
|
|
|
if (write)
|
|
copy_write_sectors(buf, wordcount);
|
|
else
|
|
copy_read_sectors(buf, wordcount);
|
|
|
|
/*
|
|
"Device errors encountered during READ MULTIPLE commands
|
|
are posted at the beginning of the block or partial block
|
|
transfer, but the DRQ bit is still set to one and the data
|
|
transfer shall take place, including transfer of corrupted
|
|
data, if any."
|
|
-- ATA specification
|
|
*/
|
|
if ( status & (STATUS_BSY | STATUS_ERR | STATUS_DF) ) {
|
|
perform_soft_reset();
|
|
ret = -6;
|
|
/* no point retrying IDNF, sector no. was invalid */
|
|
if (error & ERROR_IDNF)
|
|
break;
|
|
goto retry;
|
|
}
|
|
|
|
buf += sectors * SECTOR_SIZE; /* Advance one chunk of sectors */
|
|
count -= sectors;
|
|
|
|
keep_ata_active();
|
|
}
|
|
}
|
|
|
|
if(!ret && !wait_for_end_of_transfer()) {
|
|
int error;
|
|
|
|
error = ATA_IN8(ATA_ERROR);
|
|
perform_soft_reset();
|
|
ret = -4;
|
|
/* no point retrying IDNF, sector no. was invalid */
|
|
if (error & ERROR_IDNF)
|
|
break;
|
|
goto retry;
|
|
}
|
|
break;
|
|
}
|
|
|
|
error:
|
|
ata_led(false);
|
|
|
|
if (ret < 0 && ata_state == ATA_SPINUP) {
|
|
/* bailed out before updating */
|
|
ata_state = ATA_ON;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
#ifndef MAX_PHYS_SECTOR_SIZE
|
|
int ata_read_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int incount,
|
|
void* inbuf)
|
|
{
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void)drive; /* unused for now */
|
|
#endif
|
|
|
|
mutex_lock(&ata_mtx);
|
|
int rc = ata_transfer_sectors(start, incount, inbuf, false);
|
|
mutex_unlock(&ata_mtx);
|
|
return rc;
|
|
}
|
|
|
|
int ata_write_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int count,
|
|
const void* buf)
|
|
{
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void)drive; /* unused for now */
|
|
#endif
|
|
|
|
mutex_lock(&ata_mtx);
|
|
int rc = ata_transfer_sectors(start, count, (void*)buf, true);
|
|
mutex_unlock(&ata_mtx);
|
|
return rc;
|
|
}
|
|
#endif /* ndef MAX_PHYS_SECTOR_SIZE */
|
|
|
|
#ifdef MAX_PHYS_SECTOR_SIZE
|
|
static int cache_sector(unsigned long sector)
|
|
{
|
|
int rc;
|
|
|
|
sector &= ~(phys_sector_mult - 1);
|
|
/* round down to physical sector boundary */
|
|
|
|
/* check whether the sector is already cached */
|
|
if (sector_cache.inuse && (sector_cache.sectornum == sector))
|
|
return 0;
|
|
|
|
/* not found: read the sector */
|
|
sector_cache.inuse = false;
|
|
rc = ata_transfer_sectors(sector, phys_sector_mult, sector_cache.data, false);
|
|
if (!rc)
|
|
{
|
|
sector_cache.sectornum = sector;
|
|
sector_cache.inuse = true;
|
|
}
|
|
return rc;
|
|
}
|
|
|
|
static inline int flush_current_sector(void)
|
|
{
|
|
return ata_transfer_sectors(sector_cache.sectornum, phys_sector_mult,
|
|
sector_cache.data, true);
|
|
}
|
|
|
|
int ata_read_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int incount,
|
|
void* inbuf)
|
|
{
|
|
int rc = 0;
|
|
int offset;
|
|
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void)drive; /* unused for now */
|
|
#endif
|
|
mutex_lock(&ata_mtx);
|
|
|
|
offset = start & (phys_sector_mult - 1);
|
|
|
|
if (offset) /* first partial sector */
|
|
{
|
|
int partcount = MIN(incount, phys_sector_mult - offset);
|
|
|
|
rc = cache_sector(start);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 1;
|
|
goto error;
|
|
}
|
|
memcpy(inbuf, sector_cache.data + offset * SECTOR_SIZE,
|
|
partcount * SECTOR_SIZE);
|
|
|
|
start += partcount;
|
|
inbuf += partcount * SECTOR_SIZE;
|
|
incount -= partcount;
|
|
}
|
|
if (incount)
|
|
{
|
|
offset = incount & (phys_sector_mult - 1);
|
|
incount -= offset;
|
|
|
|
if (incount)
|
|
{
|
|
rc = ata_transfer_sectors(start, incount, inbuf, false);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 2;
|
|
goto error;
|
|
}
|
|
start += incount;
|
|
inbuf += incount * SECTOR_SIZE;
|
|
}
|
|
if (offset)
|
|
{
|
|
rc = cache_sector(start);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 3;
|
|
goto error;
|
|
}
|
|
memcpy(inbuf, sector_cache.data, offset * SECTOR_SIZE);
|
|
}
|
|
}
|
|
|
|
error:
|
|
mutex_unlock(&ata_mtx);
|
|
|
|
return rc;
|
|
}
|
|
|
|
int ata_write_sectors(IF_MD(int drive,)
|
|
unsigned long start,
|
|
int count,
|
|
const void* buf)
|
|
{
|
|
int rc = 0;
|
|
int offset;
|
|
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void)drive; /* unused for now */
|
|
#endif
|
|
mutex_lock(&ata_mtx);
|
|
|
|
offset = start & (phys_sector_mult - 1);
|
|
|
|
if (offset) /* first partial sector */
|
|
{
|
|
int partcount = MIN(count, phys_sector_mult - offset);
|
|
|
|
rc = cache_sector(start);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 1;
|
|
goto error;
|
|
}
|
|
memcpy(sector_cache.data + offset * SECTOR_SIZE, buf,
|
|
partcount * SECTOR_SIZE);
|
|
rc = flush_current_sector();
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 2;
|
|
goto error;
|
|
}
|
|
start += partcount;
|
|
buf += partcount * SECTOR_SIZE;
|
|
count -= partcount;
|
|
}
|
|
if (count)
|
|
{
|
|
offset = count & (phys_sector_mult - 1);
|
|
count -= offset;
|
|
|
|
if (count)
|
|
{
|
|
rc = ata_transfer_sectors(start, count, (void*)buf, true);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 3;
|
|
goto error;
|
|
}
|
|
start += count;
|
|
buf += count * SECTOR_SIZE;
|
|
}
|
|
if (offset)
|
|
{
|
|
rc = cache_sector(start);
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 4;
|
|
goto error;
|
|
}
|
|
memcpy(sector_cache.data, buf, offset * SECTOR_SIZE);
|
|
rc = flush_current_sector();
|
|
if (rc)
|
|
{
|
|
rc = rc * 10 - 5;
|
|
goto error;
|
|
}
|
|
}
|
|
}
|
|
|
|
error:
|
|
mutex_unlock(&ata_mtx);
|
|
|
|
return rc;
|
|
}
|
|
#endif /* MAX_PHYS_SECTOR_SIZE */
|
|
|
|
static int STORAGE_INIT_ATTR check_registers(void)
|
|
{
|
|
int i;
|
|
wait_for_bsy();
|
|
if (ATA_IN8(ATA_STATUS) & STATUS_BSY)
|
|
return -1;
|
|
|
|
for (i = 0; i<64; i++) {
|
|
ATA_OUT8(ATA_NSECTOR, TEST_PATTERN1);
|
|
ATA_OUT8(ATA_SECTOR, TEST_PATTERN2);
|
|
ATA_OUT8(ATA_LCYL, TEST_PATTERN3);
|
|
ATA_OUT8(ATA_HCYL, TEST_PATTERN4);
|
|
|
|
if (((ATA_IN8(ATA_NSECTOR) & 0xff) == TEST_PATTERN1) &&
|
|
((ATA_IN8(ATA_SECTOR) & 0xff) == TEST_PATTERN2) &&
|
|
((ATA_IN8(ATA_LCYL) & 0xff) == TEST_PATTERN3) &&
|
|
((ATA_IN8(ATA_HCYL) & 0xff) == TEST_PATTERN4))
|
|
return 0;
|
|
|
|
sleep(1);
|
|
}
|
|
return -2;
|
|
}
|
|
|
|
static int freeze_lock(void)
|
|
{
|
|
/* does the disk support Security Mode feature set? */
|
|
if (identify_info[82] & 2)
|
|
{
|
|
ATA_OUT8(ATA_SELECT, ata_device);
|
|
|
|
if (!wait_for_rdy())
|
|
return -1;
|
|
|
|
ATA_OUT8(ATA_COMMAND, CMD_SECURITY_FREEZE_LOCK);
|
|
|
|
if (!wait_for_rdy())
|
|
return -2;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
void ata_spindown(int seconds)
|
|
{
|
|
sleep_timeout = seconds * HZ;
|
|
}
|
|
|
|
bool ata_disk_is_active(void)
|
|
{
|
|
return ata_state >= ATA_SPINUP;
|
|
}
|
|
|
|
void ata_sleepnow(void)
|
|
{
|
|
if (ata_state >= ATA_SPINUP) {
|
|
logf("ata SLEEPNOW %ld", current_tick);
|
|
mutex_lock(&ata_mtx);
|
|
if (ata_state == ATA_ON) {
|
|
if (!ata_perform_flush_cache() && !ata_perform_sleep()) {
|
|
ata_state = ATA_SLEEPING;
|
|
schedule_ata_power_off();
|
|
}
|
|
}
|
|
mutex_unlock(&ata_mtx);
|
|
}
|
|
}
|
|
|
|
void ata_spin(void)
|
|
{
|
|
keep_ata_active();
|
|
}
|
|
|
|
/* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
|
|
#ifdef HAVE_ATA_POWER_OFF
|
|
static int ata_hard_reset(void)
|
|
#else
|
|
static int STORAGE_INIT_ATTR ata_hard_reset(void)
|
|
#endif
|
|
{
|
|
int ret;
|
|
|
|
mutex_lock(&ata_mtx);
|
|
|
|
ata_reset();
|
|
|
|
/* state HRR2 */
|
|
ATA_OUT8(ATA_SELECT, ata_device); /* select the right device */
|
|
ret = wait_for_bsy();
|
|
|
|
/* Massage the return code so it is 0 on success and -1 on failure */
|
|
ret = ret?0:-1;
|
|
|
|
mutex_unlock(&ata_mtx);
|
|
|
|
return ret;
|
|
}
|
|
|
|
// not putting this into STORAGE_INIT_ATTR, as ATA spec recommends to
|
|
// re-read identify_info after soft reset. So we'll do that.
|
|
static int identify(void)
|
|
{
|
|
int i;
|
|
|
|
ATA_OUT8(ATA_SELECT, ata_device);
|
|
|
|
if(!wait_for_rdy()) {
|
|
DEBUGF("identify() - not RDY\n");
|
|
return -1;
|
|
}
|
|
ATA_OUT8(ATA_COMMAND, CMD_IDENTIFY);
|
|
|
|
if (!wait_for_start_of_transfer())
|
|
{
|
|
DEBUGF("identify() - CMD failed\n");
|
|
return -2;
|
|
}
|
|
|
|
for (i=0; i<SECTOR_SIZE/2; i++) {
|
|
/* the IDENTIFY words are already swapped, so we need to treat
|
|
this info differently that normal sector data */
|
|
identify_info[i] = ATA_SWAP_IDENTIFY(ATA_IN16(ATA_DATA));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int perform_soft_reset(void)
|
|
{
|
|
/* If this code is allowed to run on a Nano, the next reads from the flash will
|
|
* time out, so we disable it. It shouldn't be necessary anyway, since the
|
|
* ATA -> Flash interface automatically sleeps almost immediately after the
|
|
* last command.
|
|
*/
|
|
int ret;
|
|
int retry_count;
|
|
|
|
logf("ata SOFT RESET %ld", current_tick);
|
|
|
|
ATA_OUT8(ATA_SELECT, SELECT_LBA | ata_device );
|
|
ATA_OUT8(ATA_CONTROL, CONTROL_nIEN|CONTROL_SRST );
|
|
sleep(1); /* >= 5us */
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
/* DMA requires INTRQ be enabled */
|
|
ATA_OUT8(ATA_CONTROL, 0);
|
|
#else
|
|
ATA_OUT8(ATA_CONTROL, CONTROL_nIEN);
|
|
#endif
|
|
sleep(1); /* >2ms */
|
|
|
|
/* This little sucker can take up to 30 seconds */
|
|
retry_count = 8;
|
|
do
|
|
{
|
|
ret = wait_for_rdy();
|
|
} while(!ret && retry_count--);
|
|
|
|
if (!ret)
|
|
return -1;
|
|
|
|
if (identify())
|
|
return -5;
|
|
|
|
if (set_features())
|
|
return -2;
|
|
|
|
if (set_multiple_mode(multisectors))
|
|
return -3;
|
|
|
|
if (freeze_lock())
|
|
return -4;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int ata_soft_reset(void)
|
|
{
|
|
int ret = -6;
|
|
|
|
mutex_lock(&ata_mtx);
|
|
|
|
if (ata_state > ATA_OFF) {
|
|
ret = perform_soft_reset();
|
|
}
|
|
|
|
mutex_unlock(&ata_mtx);
|
|
return ret;
|
|
}
|
|
|
|
#ifdef HAVE_ATA_POWER_OFF
|
|
static int ata_power_on(void)
|
|
{
|
|
int rc;
|
|
|
|
logf("ata ON %ld", current_tick);
|
|
|
|
ide_power_enable(true);
|
|
sleep(HZ/4); /* allow voltage to build up */
|
|
|
|
/* Accessing the PP IDE controller too early after powering up the disk
|
|
* makes the core hang for a short time, causing an audio dropout. This
|
|
* also depends on the disk; iPod Mini G2 needs at least HZ/5 to get rid
|
|
* of the dropout. Since this time isn't additive (the wait_for_bsy() in
|
|
* ata_hard_reset() will shortened by the same amount), it's a good idea
|
|
* to do this on all HDD based targets. */
|
|
|
|
if( ata_hard_reset() )
|
|
return -1;
|
|
|
|
if (identify())
|
|
return -5;
|
|
|
|
rc = set_features();
|
|
if (rc)
|
|
return rc * 10 - 2;
|
|
|
|
if (set_multiple_mode(multisectors))
|
|
return -3;
|
|
|
|
if (freeze_lock())
|
|
return -4;
|
|
|
|
return 0;
|
|
}
|
|
#endif /* HAVE_ATA_POWER_OFF */
|
|
|
|
static int STORAGE_INIT_ATTR master_slave_detect(void)
|
|
{
|
|
/* master? */
|
|
ATA_OUT8(ATA_SELECT, 0);
|
|
if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
|
|
ata_device = 0;
|
|
DEBUGF("Found master harddisk\n");
|
|
}
|
|
else {
|
|
/* slave? */
|
|
ATA_OUT8(ATA_SELECT, SELECT_DEVICE1);
|
|
if (ATA_IN8(ATA_STATUS) & (STATUS_RDY|STATUS_BSY)) {
|
|
ata_device = SELECT_DEVICE1;
|
|
DEBUGF("Found slave harddisk\n");
|
|
}
|
|
else
|
|
return -1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int set_multiple_mode(int sectors)
|
|
{
|
|
ATA_OUT8(ATA_SELECT, ata_device);
|
|
|
|
if(!wait_for_rdy()) {
|
|
DEBUGF("set_multiple_mode() - not RDY\n");
|
|
return -1;
|
|
}
|
|
|
|
ATA_OUT8(ATA_NSECTOR, sectors);
|
|
ATA_OUT8(ATA_COMMAND, CMD_SET_MULTIPLE_MODE);
|
|
|
|
if (!wait_for_rdy())
|
|
{
|
|
DEBUGF("set_multiple_mode() - CMD failed\n");
|
|
return -2;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
static int get_best_mode(unsigned short identword, int max, int modetype)
|
|
{
|
|
unsigned short testbit = BIT_N(max);
|
|
|
|
while (1) {
|
|
if (identword & testbit)
|
|
return max | modetype;
|
|
testbit >>= 1;
|
|
if (!testbit)
|
|
return 0;
|
|
max--;
|
|
}
|
|
}
|
|
#endif
|
|
|
|
static int set_features(void)
|
|
{
|
|
static struct {
|
|
unsigned char id_word;
|
|
unsigned char id_bit;
|
|
unsigned char subcommand;
|
|
unsigned char parameter;
|
|
} features[] = {
|
|
{ 83, 14, 0x03, 0 }, /* force PIO mode */
|
|
{ 83, 3, 0x05, 0x80 }, /* adv. power management: lowest w/o standby */ // TODO: What about FC1307A that doesn't advertise this properly?
|
|
{ 83, 9, 0x42, 0x80 }, /* acoustic management: lowest noise */
|
|
{ 82, 6, 0xaa, 0 }, /* enable read look-ahead */
|
|
#ifdef HAVE_ATA_DMA
|
|
{ 0, 0, 0x03, 0 }, /* DMA mode */
|
|
#endif
|
|
};
|
|
int i;
|
|
int pio_mode = 2;
|
|
|
|
/* Find out the highest supported PIO mode */
|
|
if (identify_info[53] & (1<<1)) { /* Is word 64 valid? */
|
|
if (identify_info[64] & 2)
|
|
pio_mode = 4;
|
|
else if(identify_info[64] & 1)
|
|
pio_mode = 3;
|
|
}
|
|
|
|
/* Update the table: set highest supported pio mode that we also support */
|
|
features[0].parameter = 8 + pio_mode;
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
if (identify_info[53] & (1<<2))
|
|
/* Ultra DMA mode info present, find a mode */
|
|
dma_mode = get_best_mode(identify_info[88], ATA_MAX_UDMA, 0x40);
|
|
|
|
if (!dma_mode) {
|
|
/* No UDMA mode found, try to find a multi-word DMA mode */
|
|
dma_mode = get_best_mode(identify_info[63], ATA_MAX_MWDMA, 0x20);
|
|
features[4].id_word = 63;
|
|
}
|
|
else
|
|
features[4].id_word = 88;
|
|
|
|
features[4].id_bit = dma_mode & 7;
|
|
features[4].parameter = dma_mode;
|
|
#endif /* HAVE_ATA_DMA */
|
|
|
|
ATA_OUT8(ATA_SELECT, ata_device);
|
|
|
|
if (!wait_for_rdy()) {
|
|
DEBUGF("set_features() - not RDY\n");
|
|
return -1;
|
|
}
|
|
|
|
for (i=0; i < (int)(sizeof(features)/sizeof(features[0])); i++) {
|
|
if (identify_info[features[i].id_word] & BIT_N(features[i].id_bit)) {
|
|
ATA_OUT8(ATA_FEATURE, features[i].subcommand);
|
|
ATA_OUT8(ATA_NSECTOR, features[i].parameter);
|
|
ATA_OUT8(ATA_COMMAND, CMD_SET_FEATURES);
|
|
|
|
if (!wait_for_rdy()) {
|
|
DEBUGF("set_features() - CMD failed\n");
|
|
return -10 - i;
|
|
}
|
|
|
|
if((ATA_IN8(ATA_ALT_STATUS) & STATUS_ERR) && (i != 1)) {
|
|
/* some CF cards don't like advanced powermanagement
|
|
even if they mark it as supported - go figure... */
|
|
if(ATA_IN8(ATA_ERROR) & ERROR_ABRT) {
|
|
return -20 - i;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
#ifdef ATA_SET_PIO_TIMING
|
|
ata_set_pio_timings(pio_mode);
|
|
#endif
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
ata_dma_set_mode(dma_mode);
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
unsigned short* ata_get_identify(void)
|
|
{
|
|
return identify_info;
|
|
}
|
|
|
|
static int STORAGE_INIT_ATTR init_and_check(bool hard_reset)
|
|
{
|
|
int rc;
|
|
|
|
if (hard_reset)
|
|
{
|
|
/* This should reset both master and slave, we don't yet know what's in */
|
|
ata_device = 0;
|
|
if (ata_hard_reset())
|
|
return -1;
|
|
}
|
|
|
|
rc = master_slave_detect();
|
|
if (rc)
|
|
return -10 + rc;
|
|
|
|
/* symptom fix: else check_registers() below may fail */
|
|
if (hard_reset && !wait_for_bsy())
|
|
return -20;
|
|
|
|
rc = check_registers();
|
|
if (rc)
|
|
return -30 + rc;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int STORAGE_INIT_ATTR ata_init(void)
|
|
{
|
|
int rc = 0;
|
|
bool coldstart;
|
|
|
|
if (ata_state == ATA_BOOT) {
|
|
mutex_init(&ata_mtx);
|
|
}
|
|
|
|
mutex_lock(&ata_mtx);
|
|
|
|
/* must be called before ata_device_init() */
|
|
coldstart = ata_is_coldstart();
|
|
ata_led(false);
|
|
ata_device_init();
|
|
ata_enable(true);
|
|
#ifdef MAX_PHYS_SECTOR_SIZE
|
|
memset(§or_cache, 0, sizeof(sector_cache));
|
|
#endif
|
|
|
|
if (ata_state == ATA_BOOT) {
|
|
ata_state = ATA_OFF;
|
|
|
|
if (!ide_powered()) /* somebody has switched it off */
|
|
{
|
|
ide_power_enable(true);
|
|
sleep(HZ/4); /* allow voltage to build up */
|
|
}
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
/* DMA requires INTRQ be enabled */
|
|
ATA_OUT8(ATA_CONTROL, 0);
|
|
#endif
|
|
|
|
/* first try, hard reset at cold start only */
|
|
rc = init_and_check(coldstart);
|
|
|
|
if (rc)
|
|
{ /* failed? -> second try, always with hard reset */
|
|
DEBUGF("ata: init failed, retrying...\n");
|
|
rc = init_and_check(true);
|
|
if (rc) {
|
|
goto error;
|
|
}
|
|
}
|
|
|
|
rc = identify();
|
|
|
|
if (rc) {
|
|
rc = -40 + rc;
|
|
goto error;
|
|
}
|
|
|
|
multisectors = identify_info[47] & 0xff;
|
|
if (multisectors == 0) /* Invalid multisector info, try with 16 */
|
|
multisectors = 16;
|
|
|
|
DEBUGF("ata: %d sectors per ata request\n",multisectors);
|
|
|
|
total_sectors = identify_info[60] | (identify_info[61] << 16);
|
|
|
|
#ifdef HAVE_LBA48
|
|
if (identify_info[83] & 0x0400 /* 48 bit address support */
|
|
&& total_sectors == 0x0FFFFFFF) /* and disk size >= 128 GiB */
|
|
{ /* (needs BigLBA addressing) */
|
|
if (identify_info[102] || identify_info[103])
|
|
panicf("Unsupported disk size: >= 2^32 sectors");
|
|
|
|
total_sectors = identify_info[100] | (identify_info[101] << 16);
|
|
lba48 = true; /* use BigLBA */
|
|
}
|
|
#endif /* HAVE_LBA48 */
|
|
|
|
rc = freeze_lock();
|
|
|
|
if (rc) {
|
|
rc = -50 + rc;
|
|
goto error;
|
|
}
|
|
|
|
rc = set_features();
|
|
if (rc) {
|
|
rc = -60 + rc;
|
|
goto error;
|
|
}
|
|
|
|
#ifdef MAX_PHYS_SECTOR_SIZE
|
|
/* Find out the physical sector size */
|
|
if((identify_info[106] & 0xe000) == 0x6000)
|
|
phys_sector_mult = BIT_N(identify_info[106] & 0x000f);
|
|
else
|
|
phys_sector_mult = 1;
|
|
|
|
DEBUGF("ata: %d logical sectors per phys sector", phys_sector_mult);
|
|
|
|
if (phys_sector_mult > 1)
|
|
{
|
|
/* Check if drive really needs emulation - if we can access
|
|
* sector 1 then assume the drive will handle it better than
|
|
* us, and ignore the large physical sectors.
|
|
*/
|
|
char throwaway[SECTOR_SIZE];
|
|
rc = ata_transfer_sectors(1, 1, &throwaway, false);
|
|
if (rc == 0)
|
|
phys_sector_mult = 1;
|
|
}
|
|
|
|
if (phys_sector_mult > (MAX_PHYS_SECTOR_SIZE/SECTOR_SIZE))
|
|
panicf("Unsupported physical sector size: %d",
|
|
phys_sector_mult * SECTOR_SIZE);
|
|
#endif /* MAX_PHYS_SECTOR_SIZE */
|
|
|
|
ata_state = ATA_ON;
|
|
keep_ata_active();
|
|
}
|
|
rc = set_multiple_mode(multisectors);
|
|
if (rc)
|
|
rc = -70 + rc;
|
|
|
|
error:
|
|
mutex_unlock(&ata_mtx);
|
|
return rc;
|
|
}
|
|
|
|
#if (CONFIG_LED == LED_REAL)
|
|
void ata_set_led_enabled(bool enabled)
|
|
{
|
|
ata_led_enabled = enabled;
|
|
if (ata_led_enabled)
|
|
led(ata_led_on);
|
|
else
|
|
led(false);
|
|
}
|
|
#endif
|
|
|
|
long ata_last_disk_activity(void)
|
|
{
|
|
return last_disk_activity;
|
|
}
|
|
|
|
int ata_spinup_time(void)
|
|
{
|
|
return spinup_time;
|
|
}
|
|
|
|
#ifdef STORAGE_GET_INFO
|
|
void ata_get_info(IF_MD(int drive,)struct storage_info *info)
|
|
{
|
|
unsigned short *src,*dest;
|
|
static char vendor[8];
|
|
static char product[16];
|
|
static char revision[4];
|
|
#ifdef HAVE_MULTIDRIVE
|
|
(void)drive; /* unused for now */
|
|
#endif
|
|
int i;
|
|
info->sector_size = SECTOR_SIZE;
|
|
info->num_sectors = total_sectors;
|
|
|
|
src = (unsigned short*)&identify_info[27];
|
|
dest = (unsigned short*)vendor;
|
|
for (i=0;i<4;i++)
|
|
dest[i] = htobe16(src[i]);
|
|
info->vendor=vendor;
|
|
|
|
src = (unsigned short*)&identify_info[31];
|
|
dest = (unsigned short*)product;
|
|
for (i=0;i<8;i++)
|
|
dest[i] = htobe16(src[i]);
|
|
info->product=product;
|
|
|
|
src = (unsigned short*)&identify_info[23];
|
|
dest = (unsigned short*)revision;
|
|
for (i=0;i<2;i++)
|
|
dest[i] = htobe16(src[i]);
|
|
info->revision=revision;
|
|
}
|
|
#endif
|
|
|
|
#ifdef HAVE_ATA_DMA
|
|
/* Returns last DMA mode as set by set_features() */
|
|
int ata_get_dma_mode(void)
|
|
{
|
|
return dma_mode;
|
|
}
|
|
|
|
/* Needed to allow updating while waiting for DMA to complete */
|
|
void ata_keep_active(void)
|
|
__attribute__((alias("ata_spin")));
|
|
#endif
|
|
|
|
#ifdef CONFIG_STORAGE_MULTI
|
|
int ata_num_drives(int first_drive)
|
|
{
|
|
/* We don't care which logical drive number(s) we have been assigned */
|
|
(void)first_drive;
|
|
|
|
return 1;
|
|
}
|
|
#endif
|
|
|
|
int ata_event(long id, intptr_t data)
|
|
{
|
|
int rc = 0;
|
|
|
|
/* GCC does a lousy job culling unreachable cases in the default handler
|
|
if statements are in a switch statement, so we'll do it this way. Only
|
|
the first case is frequently hit anyway. */
|
|
if (LIKELY(id == Q_STORAGE_TICK)) {
|
|
/* won't see ATA_BOOT in here */
|
|
int state = ata_state;
|
|
if (state != ATA_ON || !ata_sleep_timed_out()) {
|
|
if (state == ATA_SLEEPING && ata_power_off_timed_out()) {
|
|
mutex_lock(&ata_mtx);
|
|
if (ata_state == ATA_SLEEPING) {
|
|
logf("ata OFF %ld", current_tick);
|
|
ide_power_enable(false);
|
|
ata_state = ATA_OFF;
|
|
}
|
|
mutex_unlock(&ata_mtx);
|
|
}
|
|
STG_EVENT_ASSERT_ACTIVE(STORAGE_ATA);
|
|
}
|
|
}
|
|
else if (id == Q_STORAGE_SLEEPNOW) {
|
|
ata_sleepnow();
|
|
}
|
|
else if (id == Q_STORAGE_SLEEP) {
|
|
schedule_ata_sleep(HZ/5);
|
|
}
|
|
#ifndef USB_NONE
|
|
else if (id == SYS_USB_CONNECTED) {
|
|
logf("deq USB %ld", current_tick);
|
|
if (ATA_ACTIVE_IN_USB) {
|
|
/* There is no need to force ATA power on */
|
|
STG_EVENT_ASSERT_ACTIVE(STORAGE_ATA);
|
|
}
|
|
else {
|
|
mutex_lock(&ata_mtx);
|
|
if (ata_state < ATA_ON) {
|
|
ata_led(true);
|
|
if (!(rc = ata_perform_wakeup(ata_state))) {
|
|
ata_state = ATA_ON;
|
|
}
|
|
ata_led(false);
|
|
}
|
|
mutex_unlock(&ata_mtx);
|
|
}
|
|
}
|
|
#endif /* ndef USB_NONE */
|
|
else {
|
|
rc = storage_event_default_handler(id, data, last_disk_activity,
|
|
STORAGE_ATA);
|
|
}
|
|
|
|
return rc;
|
|
}
|