eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should
be almost the same. I checked the disassembly by hand and there are only a few
differences here and there, mostly the compiler decides to compile very close
expressions slightly differently. I tried to run the new code on several targets
to make sure and saw no difference.
The major syntax changes of the new headers are as follows:
- BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once:
BF_WR(reg, field1(value1), field2(value2), ...)
- BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW
- there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply
BF_WR with field_V(name)
- the old BF_SETV macro has no trivial equivalent and is replaced with its
its equivalent for BF_WR(reg_SET, ...)
I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the
redundant "regs".
Final note: the registers were generated using the following command:
./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml
Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
138 lines
4.9 KiB
C
138 lines
4.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "stdlib.h"
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#include "string.h"
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#include "pwm-imx233.h"
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#include "clkctrl-imx233.h"
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#include "pinctrl-imx233.h"
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#include "regs/pwm.h"
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/* fake field for simpler programming */
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#define BP_PWM_CTRL_PWMx_ENABLE(x) (x)
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#define BM_PWM_CTRL_PWMx_ENABLE(x) (1 << (x))
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#define BF_PWM_CTRL_PWMx_ENABLE(x, v) (((v) << BP_PWM_CTRL_PWMx_ENABLE(x)) & BM_PWM_CTRL_PWMx_ENABLE(x))
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#define BFM_PWM_CTRL_PWMx_ENABLE(x, v) BM_PWM_CTRL_PWMx_ENABLE(x)
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/* list of divisors + register value by increasing order of divisors */
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static int pwm_cdiv_table[] =
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{
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#define DIV(d) [BV_PWM_PERIODn_CDIV__DIV_##d] = d
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DIV(1), DIV(2), DIV(4), DIV(8), DIV(16), DIV(64), DIV(256), DIV(1024)
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#undef DIV
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};
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void imx233_pwm_init(void)
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{
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imx233_reset_block(&HW_PWM_CTRL);
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imx233_clkctrl_enable(CLK_PWM, true);
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}
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bool imx233_pwm_is_enabled(int channel)
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{
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return BF_RD(PWM_CTRL, PWMx_ENABLE(channel));
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}
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void imx233_pwm_enable(int channel, bool enable)
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{
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if(enable)
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BF_SET(PWM_CTRL, PWMx_ENABLE(channel));
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else
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BF_CLR(PWM_CTRL, PWMx_ENABLE(channel));
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}
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void imx233_pwm_setup(int channel, int period, int cdiv, int active,
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int active_state, int inactive, int inactive_state)
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{
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/* stop */
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bool enable = imx233_pwm_is_enabled(channel);
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if(enable)
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imx233_pwm_enable(channel, false);
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/* setup pin */
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imx233_pinctrl_setup_vpin(VPIN_PWM(channel), "pwm", PINCTRL_DRIVE_4mA, false);
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/* watch the order ! active THEN period
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* NOTE: the register value is period-1 */
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BF_WR_ALL(PWM_ACTIVEn(channel), ACTIVE(active), INACTIVE(inactive));
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BF_WR_ALL(PWM_PERIODn(channel), PERIOD(period - 1),
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ACTIVE_STATE(active_state), INACTIVE_STATE(inactive_state), CDIV(cdiv));
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/* restore */
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imx233_pwm_enable(channel, enable);
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}
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void imx233_pwm_lookup_freq(int freq, int min_period, int *out_period, int *out_cdiv)
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{
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/* find best divisor */
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int best_freq_err = freq;
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int xtal_freq = imx233_clkctrl_get_freq(CLK_XTAL) * 1000;
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for(unsigned cdiv = 0; cdiv < ARRAYLEN(pwm_cdiv_table); cdiv++)
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{
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/* compute best period (we have two rounding choices) */
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int p = xtal_freq / (pwm_cdiv_table[cdiv] * freq);
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for(int period = p; period <= p + 1; period++)
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{
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/* avoid forbidden periods */
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if(p < min_period || p > IMX233_PWM_MAX_PERIOD)
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continue;
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/* compute actual frequency and compare with best obtained so far */
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int f = xtal_freq / (pwm_cdiv_table[cdiv] * period);
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if(ABS(freq - f) <= best_freq_err)
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{
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*out_period = period;
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*out_cdiv = cdiv;
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best_freq_err = ABS(freq - f);
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}
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}
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}
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}
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void imx233_pwm_setup_simple(int channel, int freq, int duty_cycle)
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{
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int period, cdiv;
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imx233_pwm_lookup_freq(freq, 100, &period, &cdiv);
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int inactive = (period * duty_cycle) / 100;
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imx233_pwm_setup(channel, period, cdiv, 0, BV_PWM_PERIODn_ACTIVE_STATE__1,
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inactive, BV_PWM_PERIODn_INACTIVE_STATE__0);
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}
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struct imx233_pwm_info_t imx233_pwm_get_info(int channel)
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{
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#define ENTRY(mode, name, val) [BV_PWM_PERIODn_##mode##_STATE__##name] = val
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static char active_state[] =
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{
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ENTRY(ACTIVE, 0, '0'), ENTRY(ACTIVE, 1, '1'), ENTRY(ACTIVE, HI_Z, 'Z')
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};
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static char inactive_state[] =
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{
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ENTRY(INACTIVE, 0, '0'), ENTRY(INACTIVE, 1, '1'), ENTRY(INACTIVE, HI_Z, 'Z')
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};
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#undef ENTRY
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struct imx233_pwm_info_t info;
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memset(&info, 0, sizeof(info));
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info.enabled = imx233_pwm_is_enabled(channel);
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info.cdiv = pwm_cdiv_table[BF_RD(PWM_PERIODn(channel), CDIV)];
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info.period = BF_RD(PWM_PERIODn(channel), PERIOD) + 1;
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info.active = BF_RD(PWM_ACTIVEn(channel), ACTIVE);
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info.inactive = BF_RD(PWM_ACTIVEn(channel), INACTIVE);
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info.active_state = active_state[BF_RD(PWM_PERIODn(channel), ACTIVE_STATE)];
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info.inactive_state = inactive_state[BF_RD(PWM_PERIODn(channel), INACTIVE_STATE)];
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return info;
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}
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