5db83c155a
Some mSATA adapters seem to have trouble working with Rockbox using our normal PIO timings; the timing value we use is probably out of spec and is different to the OF. Switch to using the OF's timings according to which PIO mode we select. This may not completely resolve problems with these adapters but allows Rockbox to boot and play audio. Change-Id: If73210700eb4af01864b373709ee1d15c775fb11
86 lines
2.9 KiB
C
86 lines
2.9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2006 by Barry Wardell
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef ATA_TARGET_H
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#define ATA_TARGET_H
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#include "config.h"
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/* primary channel */
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#define ATA_DATA (*((volatile unsigned short*)(IDE_BASE + 0x1e0)))
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#define ATA_ERROR (*((volatile unsigned char*)(IDE_BASE + 0x1e4)))
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#define ATA_NSECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1e8)))
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#define ATA_SECTOR (*((volatile unsigned char*)(IDE_BASE + 0x1ec)))
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#define ATA_LCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f0)))
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#define ATA_HCYL (*((volatile unsigned char*)(IDE_BASE + 0x1f4)))
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#define ATA_SELECT (*((volatile unsigned char*)(IDE_BASE + 0x1f8)))
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#define ATA_COMMAND (*((volatile unsigned char*)(IDE_BASE + 0x1fc)))
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#define ATA_CONTROL (*((volatile unsigned char*)(IDE_BASE + 0x3f8)))
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#if (CONFIG_CPU == PP5002)
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#define ATA_OUT8(reg,val) do { reg = (val); \
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while (!(IDE_CFG_STATUS & 0x40)); \
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} while (0)
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/* Plain C reading and writing. See comment in ata-as-arm.S */
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#elif defined CPU_PP502x
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/* asm optimized reading and writing */
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#define ATA_OPTIMIZED_READING
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#define ATA_OPTIMIZED_WRITING
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#define ATA_SET_PIO_TIMING
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#endif /* CONFIG_CPU */
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#ifdef HAVE_ATA_DMA
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/* IDE DMA controller registers */
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#define IDE_DMA_CONTROL (*(volatile unsigned long *)(0xc3000400))
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#define IDE_DMA_LENGTH (*(volatile unsigned long *)(0xc3000408))
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#define IDE_DMA_ADDR (*(volatile unsigned long *)(0xc300040C))
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/* Maximum multi-word DMA mode supported by the controller */
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#define ATA_MAX_MWDMA 2
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#ifndef BOOTLOADER
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/* The PP5020 supports UDMA 4, but it needs cpu boosting and only
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* improves performance by ~10% with a stock disk.
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* UDMA 2 is stable at 30 Mhz.
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* UDMA 1 is stable at 24 Mhz.
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*/
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#if CPUFREQ_NORMAL >= 30000000
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#define ATA_MAX_UDMA 2
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#elif CPUFREQ_NORMAL >= 24000000
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#define ATA_MAX_UDMA 1
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#else
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#error "CPU speeds under 24Mhz have not been tested with DMA"
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#endif
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#else
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/* The bootloader runs at 24 Mhz and needs a slower mode */
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#define ATA_MAX_UDMA 1
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#endif
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#endif /* HAVE_ATA_DMA */
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#endif /* ATA_TARGET_H */
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