588 lines
20 KiB
C
588 lines
20 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "system.h"
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#include "power.h"
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#include "string.h"
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#include "usb.h"
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#include "system-target.h"
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#include "power-imx233.h"
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#include "pinctrl-imx233.h"
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#include "fmradio_i2c.h"
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#include "rtc-imx233.h"
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#include "regs/power.h"
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__10mA (1 << 0)
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__20mA (1 << 1)
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__50mA (1 << 2)
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__100mA (1 << 3)
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__200mA (1 << 4)
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#define BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__400mA (1 << 5)
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#define BV_POWER_CHARGE_BATTCHRG_I__10mA (1 << 0)
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#define BV_POWER_CHARGE_BATTCHRG_I__20mA (1 << 1)
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#define BV_POWER_CHARGE_BATTCHRG_I__50mA (1 << 2)
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#define BV_POWER_CHARGE_BATTCHRG_I__100mA (1 << 3)
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#define BV_POWER_CHARGE_BATTCHRG_I__200mA (1 << 4)
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#define BV_POWER_CHARGE_BATTCHRG_I__400mA (1 << 5)
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#define BV_POWER_CHARGE_STOP_ILIMIT__10mA (1 << 0)
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#define BV_POWER_CHARGE_STOP_ILIMIT__20mA (1 << 1)
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#define BV_POWER_CHARGE_STOP_ILIMIT__50mA (1 << 2)
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#define BV_POWER_CHARGE_STOP_ILIMIT__100mA (1 << 3)
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#if IMX233_SUBTARGET >= 3700
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#define HW_POWER_VDDDCTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDDCTRL__TRG_MIN 800 /* mV */
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#define HW_POWER_VDDACTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDACTRL__TRG_MIN 1500 /* mV */
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#define HW_POWER_VDDIOCTRL__TRG_STEP 25 /* mV */
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#define HW_POWER_VDDIOCTRL__TRG_MIN 2800 /* mV */
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#define HW_POWER_VDDMEMCTRL__TRG_STEP 50 /* mV */
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#define HW_POWER_VDDMEMCTRL__TRG_MIN 1700 /* mV */
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#else
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/* don't use the full available range because of the weird encodings for
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* extreme values which are useless anyway */
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#define HW_POWER_VDDDCTRL__TRG_STEP 32 /* mV */
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#define HW_POWER_VDDDCTRL__TRG_MIN 1280 /* mV */
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#define HW_POWER_VDDDCTRL__TRG_OFF 8 /* below 8, the register value doesn't encode linearly */
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#endif
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#define BV_POWER_MISC_FREQSEL__RES 0
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#define BV_POWER_MISC_FREQSEL__20MHz 1
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#define BV_POWER_MISC_FREQSEL__24MHz 2
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#define BV_POWER_MISC_FREQSEL__19p2MHz 3
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#define BV_POWER_MISC_FREQSEL__14p4MHz 4
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#define BV_POWER_MISC_FREQSEL__18MHz 5
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#define BV_POWER_MISC_FREQSEL__21p6MHz 6
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#define BV_POWER_MISC_FREQSEL__17p28MHz 7
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struct current_step_bit_t
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{
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unsigned current;
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uint32_t bit;
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};
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/* in decreasing order */
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static struct current_step_bit_t g_charger_current_bits[] =
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{
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{ 400, BV_POWER_CHARGE_BATTCHRG_I__400mA },
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{ 200, BV_POWER_CHARGE_BATTCHRG_I__200mA },
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{ 100, BV_POWER_CHARGE_BATTCHRG_I__100mA },
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{ 50, BV_POWER_CHARGE_BATTCHRG_I__50mA },
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{ 20, BV_POWER_CHARGE_BATTCHRG_I__20mA },
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{ 10, BV_POWER_CHARGE_BATTCHRG_I__10mA }
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};
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/* in decreasing order */
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static struct current_step_bit_t g_charger_stop_current_bits[] =
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{
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{ 100, BV_POWER_CHARGE_STOP_ILIMIT__100mA },
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{ 50, BV_POWER_CHARGE_STOP_ILIMIT__50mA },
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{ 20, BV_POWER_CHARGE_STOP_ILIMIT__20mA },
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{ 10, BV_POWER_CHARGE_STOP_ILIMIT__10mA }
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};
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#if IMX233_SUBTARGET >= 3780
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/* in decreasing order */
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static struct current_step_bit_t g_4p2_charge_limit_bits[] =
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{
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{ 400, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__400mA },
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{ 200, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__200mA },
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{ 100, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__100mA },
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{ 50, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__50mA },
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{ 20, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__20mA },
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{ 10, BV_POWER_5VCTRL_CHARGE_4P2_ILIMIT__10mA }
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};
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#endif
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/* FIXME
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* POWER_STS.VBUSVALID does not reflect the actual vbusvalid value, only
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* VBUSVALID_STATUS does. Indeed the VBUSVALID field can be locked using
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* VBUSVALIDPIOLOCK. Some Freescale code suggests locking is required for
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* proper operation of the USB ARC core. This is problematic though
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* because it prevents proper usage of the VDD5V irq.
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* Since we didn't encounter this problem, we never lock VBUSVALID
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*
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* WARNING
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* Using VBUSVALID IRQ is broken on STMP3700 (see errata). The IRQ cannot be
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* cleared. Currently fallback to the VDD5V>VDDIO method even though it's less
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* reliable (we could use polling too).
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*/
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#if IMX233_SUBTARGET >= 3780
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#define USE_VBUSVALID
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#endif
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bool imx233_power_usb_detect(void)
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{
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#ifdef USE_VBUSVALID
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return BF_RD(POWER_STS, VBUSVALID);
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#else
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return BF_RD(POWER_STS, VDD5V_GT_VDDIO);
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#endif
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}
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void INT_VDD5V(void)
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{
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#ifdef USE_VBUSVALID
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if(BF_RD(POWER_CTRL, VBUSVALID_IRQ))
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{
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if(BF_RD(POWER_STS, VBUSVALID))
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usb_insert_int();
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else
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usb_remove_int();
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/* reverse polarity */
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BF_WR(POWER_CTRL_TOG, POLARITY_VBUSVALID(1));
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/* clear int */
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BF_CLR(POWER_CTRL, VBUSVALID_IRQ);
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}
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#else
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if(BF_RD(POWER_CTRL, VDD5V_GT_VDDIO_IRQ))
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{
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if(BF_RD(POWER_STS, VDD5V_GT_VDDIO))
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usb_insert_int();
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else
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usb_remove_int();
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/* reverse polarity */
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BF_WR(POWER_CTRL_TOG, POLARITY_VDD5V_GT_VDDIO(1));
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/* clear int */
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BF_CLR(POWER_CTRL, VDD5V_GT_VDDIO_IRQ);
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}
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#endif
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}
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void imx233_power_init(void)
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{
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#if IMX233_SUBTARGET >= 3700
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BF_CLR(POWER_MINPWR, HALF_FETS);
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#endif
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/* setup vbusvalid parameters: set threshold to 4v and power up comparators */
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BF_CS(POWER_5VCTRL, VBUSVALID_TRSH(1));
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#if IMX233_SUBTARGET >= 3780
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BF_SET(POWER_5VCTRL, PWRUP_VBUS_CMPS);
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#else
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BF_SET(POWER_5VCTRL, OTG_PWRUP_CMPS);
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#endif
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/* enable vbusvalid detection method for the dcdc (improves efficiency) */
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BF_SET(POWER_5VCTRL, VBUSVALID_5VDETECT);
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/* disable shutdown on 5V fail */
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BF_CLR(POWER_5VCTRL, PWDN_5VBRNOUT);
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#ifdef USE_VBUSVALID
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/* make sure VBUSVALID is unlocked */
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BF_CLR(POWER_DEBUG, VBUSVALIDPIOLOCK);
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/* clear vbusvalid irq and set correct polarity */
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BF_CLR(POWER_CTRL, VBUSVALID_IRQ);
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if(BF_RD(POWER_STS, VBUSVALID))
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BF_CLR(POWER_CTRL, POLARITY_VBUSVALID);
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else
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BF_SET(POWER_CTRL, POLARITY_VBUSVALID);
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BF_SET(POWER_CTRL, ENIRQ_VBUS_VALID);
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/* make sure old detection way is not enabled */
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BF_CLR(POWER_CTRL, ENIRQ_VDD5V_GT_VDDIO);
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#else
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BF_CLR(POWER_CTRL, VDD5V_GT_VDDIO_IRQ);
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if(BF_RD(POWER_STS, VDD5V_GT_VDDIO))
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BF_CLR(POWER_CTRL, POLARITY_VDD5V_GT_VDDIO);
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else
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BF_SET(POWER_CTRL, POLARITY_VDD5V_GT_VDDIO);
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BF_SET(POWER_CTRL, ENIRQ_VDD5V_GT_VDDIO);
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/* make the vbusvalid detection way is not enabled */
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#if IMX233_SUBTARGET >= 3700
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BF_CLR(POWER_CTRL, ENIRQ_VBUS_VALID);
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#endif
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#endif
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/* the VDD5V IRQ is shared by several sources, disable them */
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#if IMX233_SUBTARGET >= 3700
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BF_CLR(POWER_CTRL, ENIRQ_PSWITCH);
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BF_CLR(POWER_CTRL, ENIRQ_DC_OK);
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#if IMX233_SUBTARGET < 3780
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BF_CLR(POWER_CTRL, ENIRQ_LINREG_OK);
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#endif /* IMX233_SUBTARGET < 3780 */
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#endif /* IMX233_SUBTARGET >= 3700 */
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imx233_icoll_enable_interrupt(INT_SRC_VDD5V, true);
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}
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void power_init(void)
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{
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}
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void power_off(void)
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{
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imx233_system_prepare_shutdown();
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/* power down */
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HW_POWER_RESET = BF_OR(POWER_RESET, UNLOCK_V(KEY), PWD(1));
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while(1);
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}
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unsigned int power_input_status(void)
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{
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return (usb_detect() == USB_INSERTED)
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? POWER_INPUT_MAIN_CHARGER : POWER_INPUT_NONE;
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}
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bool charging_state(void)
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{
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return BF_RD(POWER_STS, CHRGSTS);
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}
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void imx233_power_set_charge_current(unsigned current)
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{
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#if IMX233_SUBTARGET >= 3700
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BF_CLR(POWER_CHARGE, BATTCHRG_I);
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#else
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BF_CLR(POWER_BATTCHRG, BATTCHRG_I);
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#endif
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/* find closest current LOWER THAN OR EQUAL TO the expected current */
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for(unsigned i = 0; i < ARRAYLEN(g_charger_current_bits); i++)
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if(current >= g_charger_current_bits[i].current)
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{
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current -= g_charger_current_bits[i].current;
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#if IMX233_SUBTARGET >= 3700
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BF_WR(POWER_CHARGE_SET, BATTCHRG_I(g_charger_current_bits[i].bit));
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#else
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BF_WR(POWER_BATTCHRG_SET, BATTCHRG_I(g_charger_current_bits[i].bit));
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#endif
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}
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}
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void imx233_power_set_stop_current(unsigned current)
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{
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#if IMX233_SUBTARGET >= 3700
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BF_CLR(POWER_CHARGE, STOP_ILIMIT);
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#else
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BF_CLR(POWER_BATTCHRG, STOP_ILIMIT);
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#endif
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/* find closest current GREATHER THAN OR EQUAL TO the expected current */
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unsigned sum = 0;
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for(unsigned i = 0; i < ARRAYLEN(g_charger_stop_current_bits); i++)
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sum += g_charger_stop_current_bits[i].current;
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for(unsigned i = 0; i < ARRAYLEN(g_charger_stop_current_bits); i++)
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{
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sum -= g_charger_stop_current_bits[i].current;
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if(current > sum)
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{
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current -= g_charger_stop_current_bits[i].current;
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#if IMX233_SUBTARGET >= 3700
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BF_WR(POWER_CHARGE_SET, STOP_ILIMIT(g_charger_stop_current_bits[i].bit));
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#else
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BF_WR(POWER_BATTCHRG_SET, STOP_ILIMIT(g_charger_stop_current_bits[i].bit));
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#endif
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}
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}
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}
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/* regulator info */
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#define HAS_BO (1 << 0)
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#define HAS_LINREG (1 << 1)
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#define HAS_LINREG_OFFSET (1 << 2)
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#define HAS_ABS_BO (1 << 3)
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static struct
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{
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unsigned min, step;
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int off; // offset in the register value
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volatile uint32_t *reg;
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uint32_t trg_bm, trg_bp; // bitmask and bitpos
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unsigned flags;
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uint32_t bo_bm, bo_bp; // bitmask and bitpos
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uint32_t linreg_bm;
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uint32_t linreg_offset_bm, linreg_offset_bp; // bitmask and bitpos
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} regulator_info[] =
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{
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#define ADD_REGULATOR(name, mask) \
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.min = HW_POWER_##name##CTRL__TRG_MIN, \
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.step = HW_POWER_##name##CTRL__TRG_STEP, \
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.reg = &HW_POWER_##name##CTRL, \
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.trg_bm = BM_POWER_##name##CTRL_TRG, \
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.trg_bp = BP_POWER_##name##CTRL_TRG, \
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.flags = mask, \
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.off = 0
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#define ADD_REGULATOR_BO(name) \
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.bo_bm = BM_POWER_##name##CTRL_BO_OFFSET, \
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.bo_bp = BP_POWER_##name##CTRL_BO_OFFSET
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#define ADD_REGULATOR_LINREG(name) \
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.linreg_bm = BM_POWER_##name##CTRL_ENABLE_LINREG
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#define ADD_REGULATOR_LINREG_OFFSET(name) \
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.linreg_offset_bm = BM_POWER_##name##CTRL_LINREG_OFFSET, \
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.linreg_offset_bp = BP_POWER_##name##CTRL_LINREG_OFFSET
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#if IMX233_SUBTARGET >= 3700
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[REGULATOR_VDDD] =
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{
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ADD_REGULATOR(VDDD, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDD),
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ADD_REGULATOR_LINREG(VDDD),
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ADD_REGULATOR_LINREG_OFFSET(VDDD)
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},
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[REGULATOR_VDDA] =
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{
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ADD_REGULATOR(VDDA, HAS_BO|HAS_LINREG|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDA),
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ADD_REGULATOR_LINREG(VDDA),
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ADD_REGULATOR_LINREG_OFFSET(VDDA)
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},
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[REGULATOR_VDDIO] =
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{
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ADD_REGULATOR(VDDIO, HAS_BO|HAS_LINREG_OFFSET),
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ADD_REGULATOR_BO(VDDIO),
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ADD_REGULATOR_LINREG_OFFSET(VDDIO)
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},
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#if IMX233_SUBTARGET >= 3780
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[REGULATOR_VDDMEM] =
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{
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ADD_REGULATOR(VDDMEM, HAS_LINREG),
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ADD_REGULATOR_LINREG(VDDMEM),
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},
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#endif
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#else
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[REGULATOR_VDDD] =
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{
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.min = HW_POWER_VDDDCTRL__TRG_MIN,
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.step = HW_POWER_VDDDCTRL__TRG_STEP,
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.off = HW_POWER_VDDDCTRL__TRG_OFF,
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.reg = &HW_POWER_VDDCTRL,
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.flags = HAS_BO | HAS_ABS_BO,
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.trg_bm = BM_POWER_VDDCTRL_VDDD_TRG,
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.trg_bp = BP_POWER_VDDCTRL_VDDD_TRG,
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.bo_bm = BM_POWER_VDDCTRL_VDDD_BO,
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.bo_bp = BP_POWER_VDDCTRL_VDDD_BO,
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},
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#endif
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};
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void imx233_power_get_regulator(enum imx233_regulator_t reg, unsigned *value_mv,
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unsigned *brownout_mv)
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{
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uint32_t reg_val = *regulator_info[reg].reg;
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/* read target value */
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unsigned raw_val = (reg_val & regulator_info[reg].trg_bm) >> regulator_info[reg].trg_bp;
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raw_val -= regulator_info[reg].off;
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/* convert it to mv */
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if(value_mv)
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*value_mv = regulator_info[reg].min + regulator_info[reg].step * raw_val;
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if(regulator_info[reg].flags & HAS_BO)
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{
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/* read brownout offset */
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unsigned raw_bo = (reg_val & regulator_info[reg].bo_bm) >> regulator_info[reg].bo_bp;
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raw_bo -= regulator_info[reg].off;
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if(!(regulator_info[reg].flags & HAS_ABS_BO))
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raw_bo = raw_val - raw_bo;
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/* convert it to mv */
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if(brownout_mv)
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*brownout_mv = regulator_info[reg].min + regulator_info[reg].step * raw_bo;
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}
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else if(brownout_mv)
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*brownout_mv = 0;
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}
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#if IMX233_SUBTARGET >= 3700 && IMX233_SUBTARGET < 3780
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static void update_dcfuncv(void)
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{
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int vddd, vdda, vddio;
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imx233_power_get_regulator(REGULATOR_VDDD, &vddd, NULL);
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imx233_power_get_regulator(REGULATOR_VDDA, &vdda, NULL);
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imx233_power_get_regulator(REGULATOR_VDDIO, &vddio, NULL);
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// assume Li-Ion, to divide by 6.25, do *100 and /625
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BF_WR_ALL(POWER_DCFUNCV, VDDIO(((vddio - vdda) * 100) / 625),
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VDDD(((vdda - vddd) * 100) / 625));
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}
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#endif
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void imx233_power_set_regulator(enum imx233_regulator_t reg, unsigned value_mv,
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unsigned brownout_mv)
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{
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// compute raw values
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unsigned raw_val = (value_mv - regulator_info[reg].min) / regulator_info[reg].step;
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|
raw_val += regulator_info[reg].off;
|
|
if(!(regulator_info[reg].flags & HAS_ABS_BO))
|
|
brownout_mv = value_mv - brownout_mv;
|
|
unsigned raw_bo_offset = brownout_mv/ regulator_info[reg].step;
|
|
raw_bo_offset += regulator_info[reg].off;
|
|
// clear dc-dc ok flag
|
|
#if IMX233_SUBTARGET >= 3700
|
|
BF_SET(POWER_CTRL, DC_OK_IRQ);
|
|
#endif
|
|
// update
|
|
uint32_t reg_val = (*regulator_info[reg].reg) & ~regulator_info[reg].trg_bm;
|
|
reg_val |= raw_val << regulator_info[reg].trg_bp;
|
|
if(regulator_info[reg].flags & HAS_BO)
|
|
{
|
|
reg_val &= ~regulator_info[reg].bo_bm;
|
|
reg_val |= raw_bo_offset << regulator_info[reg].bo_bp;
|
|
}
|
|
*regulator_info[reg].reg = reg_val;
|
|
/* Wait until regulator is stable (ie brownout condition is gone)
|
|
* If DC-DC is used, we can use the DCDC_OK irq
|
|
* Otherwise it is unreliable (doesn't work when lowering voltage on linregs)
|
|
* It usually takes between 0.5ms and 2.5ms */
|
|
#if IMX233_SUBTARGET >= 3700
|
|
sleep(1);
|
|
#else
|
|
if(!BF_RD(POWER_5VCTRL, EN_DCDC1) || !BF_RD(POWER_5VCTRL, EN_DCDC2))
|
|
panicf("regulator %d: wait for voltage stabilize in linreg mode !", reg);
|
|
unsigned timeout = current_tick + (HZ * 20) / 1000;
|
|
while(!BF_RD(POWER_STS, DC1_OK) || !BF_RD(POWER_STS, DC2_OK) || !TIME_AFTER(current_tick, timeout))
|
|
yield();
|
|
if(!BF_RD(POWER_STS, DC1_OK) || !BF_RD(POWER_STS, DC2_OK))
|
|
panicf("regulator %d: failed to stabilize", reg);
|
|
#endif
|
|
/* On STMP37xx, we need to update the weird HW_POWER_DCFUNCV register */
|
|
#if IMX233_SUBTARGET >= 3700 && IMX233_SUBTARGET < 3780
|
|
update_dcfuncv();
|
|
#endif
|
|
}
|
|
|
|
// offset is -1,0 or 1
|
|
void imx233_power_get_regulator_linreg(enum imx233_regulator_t reg,
|
|
bool *enabled, int *linreg_offset)
|
|
{
|
|
if(enabled && regulator_info[reg].flags & HAS_LINREG)
|
|
*enabled = !!(*regulator_info[reg].reg & regulator_info[reg].linreg_bm);
|
|
else if(enabled)
|
|
*enabled = true;
|
|
if(regulator_info[reg].flags & HAS_LINREG_OFFSET)
|
|
{
|
|
unsigned v = (*regulator_info[reg].reg & regulator_info[reg].linreg_offset_bm);
|
|
v >>= regulator_info[reg].linreg_offset_bp;
|
|
if(linreg_offset)
|
|
*linreg_offset = (v == 0) ? 0 : (v == 1) ? 1 : -1;
|
|
}
|
|
else if(linreg_offset)
|
|
*linreg_offset = 0;
|
|
}
|
|
|
|
// offset is -1,0 or 1
|
|
/*
|
|
void imx233_power_set_regulator_linreg(enum imx233_regulator_t reg,
|
|
bool enabled, int linreg_offset)
|
|
{
|
|
}
|
|
*/
|
|
|
|
#if IMX233_SUBTARGET < 3700
|
|
int imx233_power_sense_die_temperature(int *min, int *max)
|
|
{
|
|
static int die_temp[] =
|
|
{
|
|
-50, -40, -30, -20, -10, 0, 15, 25, 35, 45, 55, 70, 85, 95, 105, 115, 130
|
|
};
|
|
/* power up temperature sensor */
|
|
BF_WR(POWER_SPEEDTEMP_CLR, TEMP_CTRL(1 << 3));
|
|
/* read temp */
|
|
int sense = BF_RD(POWER_SPEEDTEMP, TEMP_STS);
|
|
*min = die_temp[sense];
|
|
*max = die_temp[sense + 1];
|
|
/* power down temperature sensor */
|
|
BF_WR(POWER_SPEEDTEMP_SET, TEMP_CTRL(1 << 3));
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
struct imx233_power_info_t imx233_power_get_info(unsigned flags)
|
|
{
|
|
#if IMX233_SUBTARGET >= 3700
|
|
static int dcdc_freqsel[8] = {
|
|
[BV_POWER_MISC_FREQSEL__RES] = 0,
|
|
[BV_POWER_MISC_FREQSEL__20MHz] = 20000,
|
|
[BV_POWER_MISC_FREQSEL__24MHz] = 24000,
|
|
[BV_POWER_MISC_FREQSEL__19p2MHz] = 19200,
|
|
[BV_POWER_MISC_FREQSEL__14p4MHz] = 14200,
|
|
[BV_POWER_MISC_FREQSEL__18MHz] = 18000,
|
|
[BV_POWER_MISC_FREQSEL__21p6MHz] = 21600,
|
|
[BV_POWER_MISC_FREQSEL__17p28MHz] = 17280,
|
|
};
|
|
#endif
|
|
struct imx233_power_info_t s;
|
|
memset(&s, 0, sizeof(s));
|
|
#if IMX233_SUBTARGET >= 3700
|
|
if(flags & POWER_INFO_DCDC)
|
|
{
|
|
s.dcdc_sel_pllclk = BF_RD(POWER_MISC, SEL_PLLCLK);
|
|
s.dcdc_freqsel = dcdc_freqsel[BF_RD(POWER_MISC, FREQSEL)];
|
|
}
|
|
#endif
|
|
if(flags & POWER_INFO_CHARGE)
|
|
{
|
|
#if IMX233_SUBTARGET >= 3700
|
|
uint32_t current = BF_RD(POWER_CHARGE, BATTCHRG_I);
|
|
uint32_t stop_current = BF_RD(POWER_CHARGE, STOP_ILIMIT);
|
|
#else
|
|
uint32_t current = BF_RD(POWER_BATTCHRG, BATTCHRG_I);
|
|
uint32_t stop_current = BF_RD(POWER_BATTCHRG, STOP_ILIMIT);
|
|
#endif
|
|
for(unsigned i = 0; i < ARRAYLEN(g_charger_current_bits); i++)
|
|
if(current & g_charger_current_bits[i].bit)
|
|
s.charge_current += g_charger_current_bits[i].current;
|
|
for(unsigned i = 0; i < ARRAYLEN(g_charger_stop_current_bits); i++)
|
|
if(stop_current & g_charger_stop_current_bits[i].bit)
|
|
s.stop_current += g_charger_stop_current_bits[i].current;
|
|
s.charging = BF_RD(POWER_STS, CHRGSTS);
|
|
#if IMX233_SUBTARGET >= 3700
|
|
s.batt_adj = BF_RD(POWER_BATTMONITOR, EN_BATADJ);
|
|
#else
|
|
s.batt_adj = BF_RD(POWER_DC1MULTOUT, EN_BATADJ);
|
|
#endif
|
|
}
|
|
#if IMX233_SUBTARGET >= 3780
|
|
if(flags & POWER_INFO_4P2)
|
|
{
|
|
s._4p2_enable = BF_RD(POWER_DCDC4P2, ENABLE_4P2);
|
|
s._4p2_dcdc = BF_RD(POWER_DCDC4P2, ENABLE_DCDC);
|
|
s._4p2_cmptrip = BF_RD(POWER_DCDC4P2, CMPTRIP);
|
|
s._4p2_dropout = BF_RD(POWER_DCDC4P2, DROPOUT_CTRL);
|
|
}
|
|
#endif
|
|
if(flags & POWER_INFO_5V)
|
|
{
|
|
#if IMX233_SUBTARGET >= 3780
|
|
s._5v_pwd_charge_4p2 = BF_RD(POWER_5VCTRL, PWD_CHARGE_4P2);
|
|
#endif
|
|
s._5v_dcdc_xfer = BF_RD(POWER_5VCTRL, DCDC_XFER);
|
|
#if IMX233_SUBTARGET >= 3700
|
|
s._5v_enable_dcdc = BF_RD(POWER_5VCTRL, ENABLE_DCDC);
|
|
#else
|
|
s._5v_enable_dcdc = BF_RD(POWER_5VCTRL, EN_DCDC1) && BF_RD(POWER_5VCTRL, EN_DCDC2);
|
|
#endif
|
|
#if IMX233_SUBTARGET >= 3780
|
|
uint32_t charge_4p2_ilimit = BF_RD(POWER_5VCTRL, CHARGE_4P2_ILIMIT);
|
|
for(unsigned i = 0; i < ARRAYLEN(g_4p2_charge_limit_bits); i++)
|
|
if(charge_4p2_ilimit & g_4p2_charge_limit_bits[i].bit)
|
|
s._5v_charge_4p2_limit += g_4p2_charge_limit_bits[i].current;
|
|
#endif
|
|
s._5v_vbusvalid_detect = BF_RD(POWER_5VCTRL, VBUSVALID_5VDETECT);
|
|
#if IMX233_SUBTARGET >= 3780
|
|
s._5v_vbus_cmps = BF_RD(POWER_5VCTRL, PWRUP_VBUS_CMPS);
|
|
#else
|
|
s._5v_vbus_cmps = BF_RD(POWER_5VCTRL, OTG_PWRUP_CMPS);
|
|
#endif
|
|
s._5v_vbusvalid_thr =
|
|
BF_RD(POWER_5VCTRL, VBUSVALID_TRSH) == 0 ?
|
|
2900
|
|
: 3900 + BF_RD(POWER_5VCTRL, VBUSVALID_TRSH) * 100;
|
|
}
|
|
return s;
|
|
}
|