950b2dfa2c
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@24783 a1c6a512-1295-4272-9138-f99709370657
318 lines
10 KiB
ArmAsm
318 lines
10 KiB
ArmAsm
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2008 by Jens Arnold
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* Copyright (C) 2009 by Andrew Mahone
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*
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* Optimised unsigned integer division for ARMv4
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*
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* Based on: libgcc routines for ARM cpu, additional algorithms from ARM System
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* Developer's Guide
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* Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
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* Copyright 1995, 1996, 1998, 1999, 2000, 2003, 2004, 2005
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* Free Software Foundation, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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/* On targets with codec iram, a header file will be generated after an initial
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link of the APE codec, stating the amount of IRAM remaining for use by the
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reciprocal lookup table. */
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#if !defined(APE_PRE) && defined(USE_IRAM) && ARM_ARCH < 5
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#include "apps/codecs/ape_free_iram.h"
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#endif
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/* Codecs should not normally do this, but we need to check a macro, and
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* codecs.h would confuse the assembler. */
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#ifdef USE_IRAM
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#define DIV_RECIP
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.section .icode,"ax",%progbits
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#else
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.text
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#endif
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.align
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.global udiv32_arm
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.type udiv32_arm,%function
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#if ARM_ARCH < 5
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/* Adapted from an algorithm given in ARM System Developer's Guide (7.3.1.2)
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for dividing a 30-bit value by a 15-bit value, with two operations per
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iteration by storing quotient and remainder together and adding the previous
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quotient bit during trial subtraction. Modified to work with any dividend
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and divisor both less than 1 << 30, and skipping trials by calculating bits
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in output. */
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.macro ARM_DIV_31_BODY dividend, divisor, result, bits, curbit, quotient, remainder
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mov \bits, #1
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/* Shift the divisor left until it aligns with the numerator. If it already
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has the high bit set, this is fine, everything inside .rept will be
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skipped, and the add before and adcs after will set the one-bit result
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to zero. */
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cmn \divisor, \dividend, lsr #16
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movcs \divisor, \divisor, lsl #16
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addcs \bits, \bits, #16
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cmn \divisor, \dividend, lsr #8
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movcs \divisor, \divisor, lsl #8
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addcs \bits, \bits, #8
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cmn \divisor, \dividend, lsr #4
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movcs \divisor, \divisor, lsl #4
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addcs \bits, \bits, #4
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cmn \divisor, \dividend, lsr #2
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movcs \divisor, \divisor, lsl #2
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addcs \bits, \bits, #2
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cmn \divisor, \dividend, lsr #1
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movcs \divisor, \divisor, lsl #1
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addcs \bits, \bits, #1
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adds \result, \dividend, \divisor
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subcc \result, \result, \divisor
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rsb \curbit, \bits, #31
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add pc, pc, \curbit, lsl #3
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nop
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.rept 30
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adcs \result, \divisor, \result, lsl #1
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/* Fix the remainder portion of the result. This must be done because the
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handler for 32-bit numerators needs the remainder. */
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subcc \result, \result, \divisor
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.endr
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/* Shift remainder/quotient left one, add final quotient bit */
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adc \result, \result, \result
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mov \remainder, \result, lsr \bits
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eor \quotient, \result, \remainder, lsl \bits
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.endm
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#ifndef FREE_IRAM
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.set recip_max, 2
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#else
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/* Each table entry is one word. Since a compare is done against the maximum
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entry as an immediate, the maximum entry must be a valid ARM immediate,
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which means a byte shifted by an even number of places. */
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.set recip_max, 2 + FREE_IRAM / 4
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.set recip_max_tmp, recip_max >> 8
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.set recip_mask_shift, 0
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.set tmp_shift, 16
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.rept 5
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.if recip_max_tmp >> tmp_shift
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.set recip_max_tmp, recip_max_tmp >> tmp_shift
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.set recip_mask_shift, recip_mask_shift + tmp_shift
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.endif
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.set tmp_shift, tmp_shift >> 1
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.endr
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.if recip_max_tmp
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.set recip_mask_shift, recip_mask_shift + 1
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.endif
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.set recip_mask_shift, (recip_mask_shift + 1) & 62
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.set recip_max, recip_max & (255 << recip_mask_shift)
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//.set recip_max, 2
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#endif
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udiv32_arm:
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#ifdef DIV_RECIP
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cmp r1, #3
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bcc .L_udiv_tiny
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cmp r1, #recip_max
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bhi .L_udiv
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adr r3, .L_udiv_recip_table-12
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ldr r2, [r3, r1, lsl #2]
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mov r3, r0
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umull ip, r0, r2, r0
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mul r2, r0, r1
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cmp r3, r2
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bxcs lr
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sub r0, r0, #1
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bx lr
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.L_udiv_tiny:
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cmp r1, #1
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movhi r0, r0, lsr #1
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bxcs lr
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b .L_div0
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#endif
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.L_udiv:
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/* Invert divisor. ARM_DIV_31_BODY uses adc to both subtract the divisor
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and add the next bit of the result. The correction code at .L_udiv32
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does not need the divisor inverted, but can be modified to work with it,
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and this allows the zero divisor test to be done early and without an
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explicit comparison. */
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rsbs r1, r1, #0
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#ifndef DIV_RECIP
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beq .L_div0
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#endif
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tst r0, r0
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/* High bit must be unset, otherwise shift numerator right, calculate,
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and correct results. As this case is very uncommon we want to avoid
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any other delays on the main path in handling it, so the long divide
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calls the short divide as a function. */
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bmi .L_udiv32
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.L_udiv31:
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ARM_DIV_31_BODY r0, r1, r2, r3, ip, r0, r1
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bx lr
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.L_udiv32:
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/* store original numerator and divisor, we'll need them to correct the
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result, */
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stmdb sp, { r0, r1, lr }
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/* Call __div0 here if divisor is zero, otherwise it would report the wrong
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address. */
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mov r0, r0, lsr #1
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bl .L_udiv31
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ldmdb sp, { r2, r3, lr }
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/* Move the low bit of the original numerator to the carry bit */
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movs r2, r2, lsr #1
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/* Shift the remainder left one and add in the carry bit */
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adc r1, r1, r1
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/* Subtract the original divisor from the remainder, setting carry if the
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result is non-negative */
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adds r1, r1, r3
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/* Shift quotient left one and add carry bit */
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adc r0, r0, r0
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bx lr
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.L_div0:
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/* __div0 expects the calling address on the top of the stack */
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stmdb sp!, { lr }
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mov r0, #0
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#if defined(__ARM_EABI__) || !defined(USE_IRAM)
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bl __div0
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#else
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ldr pc, [pc, #-4]
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.word __div0
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#endif
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#ifdef DIV_RECIP
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.L_udiv_recip_table:
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.set div, 3
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.rept recip_max - 2
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.if (div - 1) & div
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.set q, 0x40000000 / div
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.set r, (0x40000000 - (q * div))<<1
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.set q, q << 1
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.if r >= div
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.set q, q + 1
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.set r, r - div
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.endif
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.set r, r << 1
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.set q, q << 1
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.if r >= div
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.set q, q + 1
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.set r, r - div
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.endif
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.set q, q + 1
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.else
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.set q, 0x40000000 / div * 4
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.endif
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.word q
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.set div, div+1
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.endr
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#endif
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.size udiv32_arm, . - udiv32_arm
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#else
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.macro ARMV5_UDIV32_BODY numerator, divisor, quotient, bits, inv, neg, div0label
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cmp \numerator, \divisor
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clz \bits, \divisor
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bcc 30f
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mov \inv, \divisor, lsl \bits
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add \neg, pc, \inv, lsr #25
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cmp \inv, #1<<31
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ldrhib \inv, [\neg, #.L_udiv_est_table-.-64]
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bls 20f
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subs \bits, \bits, #7
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rsb \neg, \divisor, #0
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movpl \divisor, \inv, lsl \bits
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bmi 10f
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mul \inv, \divisor, \neg
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smlawt \divisor, \divisor, \inv, \divisor
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mul \inv, \divisor, \neg
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/* This will save a cycle on ARMv6, but requires that the numerator sign
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bit is not set (that of inv is guaranteed unset). The branch should
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predict very well, making it typically 1 cycle, and thus both the branch
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and test fill delay cycles for the multiplies. Based on logging of
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numerator sizes in the APE codec, the branch is taken about 1/10^7 of
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the time. */
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#if ARM_ARCH >= 6
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tst \numerator, \numerator
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smmla \divisor, \divisor, \inv, \divisor
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bmi 40f
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smmul \inv, \numerator, \divisor
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#else
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mov \bits, #0
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smlal \bits, \divisor, \inv, \divisor
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umull \bits, \inv, \numerator, \divisor
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#endif
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add \numerator, \numerator, \neg
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mla \divisor, \inv, \neg, \numerator
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mov \quotient, \inv
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cmn \divisor, \neg
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addcc \quotient, \quotient, #1
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addpl \quotient, \quotient, #2
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bx lr
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10:
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rsb \bits, \bits, #0
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sub \inv, \inv, #4
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mov \divisor, \inv, lsr \bits
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umull \bits, \inv, \numerator, \divisor
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mla \divisor, \inv, \neg, \numerator
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mov \quotient, \inv
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cmn \neg, \divisor, lsr #1
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addcs \divisor, \divisor, \neg, lsl #1
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addcs \quotient, \quotient, #2
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cmn \neg, \divisor
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addcs \quotient, \quotient, #1
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bx lr
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20:
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.ifnc "", "\div0label"
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rsb \bits, \bits, #31
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bne \div0label
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.endif
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mov \quotient, \numerator, lsr \bits
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bx lr
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30:
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mov \quotient, #0
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bx lr
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#if ARM_ARCH >= 6
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40:
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umull \bits, \inv, \numerator, \divisor
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add \numerator, \numerator, \neg
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mla \divisor, \inv, \neg, \numerator
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mov \quotient, \inv
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cmn \divisor, \neg
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addcc \quotient, \quotient, #1
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addpl \quotient, \quotient, #2
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bx lr
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#endif
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.endm
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udiv32_arm:
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ARMV5_UDIV32_BODY r0, r1, r0, r2, r3, ip, .L_div0
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.L_div0:
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/* __div0 expects the calling address on the top of the stack */
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stmdb sp!, { lr }
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mov r0, #0
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#if defined(__ARM_EABI__) || !defined(USE_IRAM)
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bl __div0
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#else
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ldr pc, [pc, #-4]
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.word __div0
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#endif
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.L_udiv_est_table:
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.byte 0xff, 0xfc, 0xf8, 0xf4, 0xf0, 0xed, 0xea, 0xe6
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.byte 0xe3, 0xe0, 0xdd, 0xda, 0xd7, 0xd4, 0xd2, 0xcf
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.byte 0xcc, 0xca, 0xc7, 0xc5, 0xc3, 0xc0, 0xbe, 0xbc
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.byte 0xba, 0xb8, 0xb6, 0xb4, 0xb2, 0xb0, 0xae, 0xac
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.byte 0xaa, 0xa8, 0xa7, 0xa5, 0xa3, 0xa2, 0xa0, 0x9f
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.byte 0x9d, 0x9c, 0x9a, 0x99, 0x97, 0x96, 0x94, 0x93
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.byte 0x92, 0x90, 0x8f, 0x8e, 0x8d, 0x8c, 0x8a, 0x89
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.byte 0x88, 0x87, 0x86, 0x85, 0x84, 0x83, 0x82, 0x81
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#endif
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.size udiv32_arm, . - udiv32_arm
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