8927df4205
Original fix by Marcin: it had a problem because crt0 on imx233 is more complicated than many targets: since we use virtual memory, we first disable the MMU, then move the entire image (including init and itext stuff), then setup a temporary stack to setup the MMU. Only when the MMU is enabled, can we move the init and itext stuff to its right location and finally boot. This requires some trickery because: - the initial move copies everything, including init and itext - the stack overlaps with init and itext to reclaim space - the temporary stack cannot be the same as the main stack to avoid trashing the init and itext code, also it needs to be a physical address Change-Id: Ibaf331c7d90b61f99225d93c9e621eb0f3f8f2dc
98 lines
2.2 KiB
Text
98 lines
2.2 KiB
Text
#include "config.h"
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#include "cpu.h"
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ENTRY(start)
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OUTPUT_FORMAT(elf32-littlearm)
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OUTPUT_ARCH(arm)
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STARTUP(target/arm/imx233/crt0.o)
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/* Leave a hole at the beginning of the RAM to load the firmware */
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#define RAM_HOLE 1024 * 1024
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/* Make a difference between virtual and physical address so that we can use
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* the resulting elf file with the elftosb tools which loads at the *physical*
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* address */
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MEMORY
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{
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IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
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DRAM : ORIGIN = CACHED_DRAM_ADDR + RAM_HOLE, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE - RAM_HOLE
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UDRAM : ORIGIN = UNCACHED_DRAM_ADDR + RAM_HOLE, LENGTH = DRAM_SIZE - TTB_SIZE - FRAME_SIZE - RAM_HOLE
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}
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SECTIONS
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{
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loadaddress = UNCACHED_DRAM_ADDR;
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_loadaddress = UNCACHED_DRAM_ADDR;
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loadaddressend = UNCACHED_DRAM_ADDR + RAM_HOLE;
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_loadaddressend = UNCACHED_DRAM_ADDR + RAM_HOLE;
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.dramcopystart (NOLOAD) :
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{
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_dramcopystart = .;
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} > DRAM
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.text :
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{
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*(.text*)
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*(.data*)
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*(.rodata*)
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} > DRAM
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.itext :
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{
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_iramstart = .; // always 0
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*(.vectors)
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KEEP(*(.vectors));// otherwise there are no references to it and the linker strip it
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*(.icode*)
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*(.irodata*)
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*(.idata*)
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_iramend = .;
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} > IRAM AT> DRAM
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_iramcopy = LOADADDR(.itext);
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.dramcopyend (NOLOAD) :
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{
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_dramcopyend = .;
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} > DRAM
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.ibss (NOLOAD) :
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{
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_iedata = .;
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*(.qharray)
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*(.ibss*)
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_iend = .;
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} > IRAM
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.stack (NOLOAD) :
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{
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*(.stack)
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stackbegin = .;
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. += 0x2000;
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stackend = .;
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} > DRAM
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/* physical address of the stack */
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crt0_tmpstack_phys = stackend - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR;
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/* treat .bss and .ncbss as a single section */
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.bss (NOLOAD) :
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{
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_edata = .;
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*(.bss*);
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} > DRAM
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/* align on cache size boundary to avoid mixing cached and noncached stuff */
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.ncbss . - CACHED_DRAM_ADDR + UNCACHED_DRAM_ADDR (NOLOAD) :
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{
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. = ALIGN(CACHEALIGN_SIZE);
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*(.ncbss*)
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. = ALIGN(CACHEALIGN_SIZE);
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} AT> DRAM
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.bssendadr (NOLOAD) :
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{
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_end = .;
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} > DRAM
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}
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