86545174b9
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25549 a1c6a512-1295-4272-9138-f99709370657
95 lines
2.7 KiB
C
95 lines
2.7 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (c) 2008 Michael Sevakis
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*
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* Clock control functions for IMX31 processor
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "system.h"
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#include "cpu.h"
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#include "ccm-imx31.h"
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unsigned int ccm_get_src_pll(void)
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{
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return (CCM_PMCR0 & 0xC0000000) == 0 ? PLL_SERIAL : PLL_MCU;
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}
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void ccm_module_clock_gating(enum IMX31_CG_LIST cg, enum IMX31_CG_MODES mode)
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{
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volatile unsigned long *reg;
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unsigned long mask;
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int shift;
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if (cg >= CG_NUM_CLOCKS)
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return;
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reg = &CCM_CGR0 + cg / 16; /* Select CGR0, CGR1, CGR2 */
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shift = 2*(cg % 16); /* Get field shift */
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mask = CG_MASK << shift; /* Select field */
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imx31_regmod32(reg, mode << shift, mask);
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}
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/* Get the PLL reference clock frequency in HZ */
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unsigned int ccm_get_pll_ref_clk(void)
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{
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if ((CCM_CCMR & (3 << 1)) == (1 << 1))
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return CONFIG_CKIL_FREQ * 1024;
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else
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return CONFIG_CKIH_FREQ;
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}
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/* Return PLL frequency in HZ */
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unsigned int ccm_get_pll(enum IMX31_PLLS pll)
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{
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uint32_t infreq = ccm_get_pll_ref_clk();
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uint32_t reg = (&CCM_MPCTL)[pll];
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uint32_t mfn = reg & 0x3ff;
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uint32_t pd = ((reg >> 26) & 0xf) + 1;
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uint64_t mfd = ((reg >> 16) & 0x3ff) + 1;
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uint32_t mfi = (reg >> 10) & 0xf;
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mfi = mfi <= 5 ? 5 : mfi;
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return 2*infreq*(mfi * mfd + mfn) / (mfd * pd);
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}
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unsigned int ccm_get_ipg_clk(void)
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{
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unsigned int pllnum = ccm_get_src_pll();
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unsigned int pll = ccm_get_pll(pllnum);
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uint32_t reg = CCM_PDR0;
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unsigned int max_pdf = ((reg >> 3) & 0x7) + 1;
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unsigned int ipg_pdf = ((reg >> 6) & 0x3) + 1;
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return pll / (max_pdf * ipg_pdf);
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}
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unsigned int ccm_get_ahb_clk(void)
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{
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unsigned int pllnum = ccm_get_src_pll();
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unsigned int pll = ccm_get_pll(pllnum);
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unsigned int max_pdf = ((CCM_PDR0 >> 3) & 0x7) + 1;
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return pll / max_pdf;
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}
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unsigned int ccm_get_ata_clk(void)
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{
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return ccm_get_ipg_clk();
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}
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