eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
94 lines
2.4 KiB
C
94 lines
2.4 KiB
C
/***************************************************************************
|
|
* __________ __ ___.
|
|
* Open \______ \ ____ ____ | | _\_ |__ _______ ___
|
|
* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
|
|
* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
|
|
* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
|
|
* \/ \/ \/ \/ \/
|
|
* $Id$
|
|
*
|
|
* Copyright © 2011 by Amaury Pouly
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License
|
|
* as published by the Free Software Foundation; either version 2
|
|
* of the License, or (at your option) any later version.
|
|
*
|
|
* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
|
|
* KIND, either express or implied.
|
|
*
|
|
****************************************************************************/
|
|
#ifndef RTC_IMX233_H
|
|
#define RTC_IMX233_H
|
|
|
|
#include "config.h"
|
|
#include "system.h"
|
|
#include "cpu.h"
|
|
|
|
#include "regs/rtc.h"
|
|
|
|
#define HW_RTC_PERSISTENTn(n) *(&HW_RTC_PERSISTENT0 + 4 * (n))
|
|
|
|
struct imx233_rtc_info_t
|
|
{
|
|
uint32_t seconds;
|
|
uint32_t persistent[6];
|
|
uint32_t alarm;
|
|
bool alarm_en, alarm_wake_en, alarm_wake, alarm_irq;
|
|
};
|
|
|
|
static inline uint32_t imx233_rtc_read_seconds(void)
|
|
{
|
|
return HW_RTC_SECONDS;
|
|
}
|
|
|
|
static inline uint32_t imx233_rtc_read_persistent(int idx)
|
|
{
|
|
return HW_RTC_PERSISTENTn(idx);
|
|
}
|
|
|
|
static inline void imx233_rtc_clear_msec_irq(void)
|
|
{
|
|
BF_CLR(RTC_CTRL, ONEMSEC_IRQ);
|
|
}
|
|
|
|
static inline void imx233_rtc_enable_msec_irq(bool enable)
|
|
{
|
|
imx233_rtc_clear_msec_irq();
|
|
if(enable)
|
|
BF_SET(RTC_CTRL, ONEMSEC_IRQ_EN);
|
|
else
|
|
BF_CLR(RTC_CTRL, ONEMSEC_IRQ_EN);
|
|
}
|
|
|
|
static inline uint32_t imx233_rtc_read_alarm(void)
|
|
{
|
|
return HW_RTC_ALARM;
|
|
}
|
|
|
|
static inline void imx233_rtc_enable_watchdog(bool en)
|
|
{
|
|
if(en)
|
|
BF_SET(RTC_CTRL, WATCHDOGEN);
|
|
else
|
|
BF_CLR(RTC_CTRL, WATCHDOGEN);
|
|
}
|
|
|
|
static inline void imx233_rtc_reset_watchdog(uint32_t ms)
|
|
{
|
|
HW_RTC_WATCHDOG = ms;
|
|
}
|
|
|
|
static inline void imx233_rtc_init(void)
|
|
{
|
|
BF_CLR(RTC_CTRL, CLKGATE);
|
|
imx233_rtc_enable_watchdog(false);
|
|
}
|
|
|
|
void imx233_rtc_write_seconds(uint32_t seconds);
|
|
void imx233_rtc_write_persistent(int idx, uint32_t val);
|
|
void imx233_rtc_write_alarm(uint32_t seconds);
|
|
|
|
struct imx233_rtc_info_t imx233_rtc_get_info(void);
|
|
|
|
#endif /* RTC_IMX233_H */
|