eac1ca22bd
NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
326 lines
9 KiB
C
326 lines
9 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2011 by Amaury Pouly
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#include "config.h"
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#include "audiohw.h"
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#include "pcm.h"
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#include "dma-imx233.h"
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#include "pcm-internal.h"
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#include "audioout-imx233.h"
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struct pcm_dma_command_t
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{
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struct apb_dma_command_t dma;
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/* padded to next multiple of cache line size (32 bytes) */
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uint32_t pad[5];
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} __attribute__((packed)) CACHEALIGN_ATTR;
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__ENSURE_STRUCT_CACHE_FRIENDLY(struct pcm_dma_command_t)
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/* Because we have no way of stopping the DMA properly (see below), we can only
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* let the tranfer finish on stop. However if the transfer is very long it could
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* take a while. We work around this by splitting big transfers into small burst
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* to make sure we can stop quickly. */
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static int dac_locked = 0;
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static struct pcm_dma_command_t dac_dma;
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static bool dac_freezed = false;
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static const void *dac_buf; /* current buffer */
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static size_t dac_size; /* remaining size */
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/* for both recording and playback: maximum transfer size, see
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* pcm_dma_apply_settings */
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static size_t dma_max_size = CACHEALIGN_UP(1600);
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enum
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{
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DAC_PLAYING,
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DAC_STOP_PENDING,
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DAC_STOPPED,
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}dac_state = DAC_STOPPED;
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/**
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* WARNING !
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* Never reset the dma channel, otherwise it will halt the DAC for some reason
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* and I don't know how to recover from this state
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* */
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static void play(void)
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{
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/* split transfer if needed */
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size_t xfer = MIN(dac_size, dma_max_size);
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dac_dma.dma.next = NULL;
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dac_dma.dma.buffer = (void *)dac_buf;
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dac_dma.dma.cmd = BF_OR(APB_CHx_CMD, COMMAND_V(READ),
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IRQONCMPLT(1), SEMAPHORE(1), XFER_COUNT(xfer));
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/* dma subsystem will make sure cached stuff is written to memory */
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dac_state = DAC_PLAYING;
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imx233_dma_start_command(APB_AUDIO_DAC, &dac_dma.dma);
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/* advance buffer */
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dac_buf += xfer;
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dac_size -= xfer;
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}
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void INT_DAC_DMA(void)
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{
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/* if stop is pending, ackonowledge stop
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* otherwise try to get some more and stop if there is none */
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if(dac_state == DAC_STOP_PENDING)
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{
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dac_state = DAC_STOPPED;
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}
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else if(dac_state == DAC_PLAYING)
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{
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/* continue if buffer is not done, otherwise try to get some new data */
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if(dac_size != 0 || pcm_play_dma_complete_callback(PCM_DMAST_OK, &dac_buf, &dac_size))
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{
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play();
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pcm_play_dma_status_callback(PCM_DMAST_STARTED);
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}
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else
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dac_state = DAC_STOPPED;
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}
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imx233_dma_clear_channel_interrupt(APB_AUDIO_DAC);
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}
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void INT_DAC_ERROR(void)
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{
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dac_state = DAC_STOPPED;
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pcm_play_dma_status_callback(PCM_DMAST_ERR_DMA);
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imx233_dma_clear_channel_interrupt(APB_AUDIO_DAC);
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}
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void pcm_play_lock(void)
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{
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if(dac_locked++ == 0)
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imx233_dma_enable_channel_interrupt(APB_AUDIO_DAC, false);
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}
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void pcm_play_unlock(void)
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{
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if(--dac_locked == 0)
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imx233_dma_enable_channel_interrupt(APB_AUDIO_DAC, true);
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}
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void pcm_play_dma_stop(void)
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{
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/* do not interrupt the current transaction because resetting the dma
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* would halt the DAC and clearing RUN causes sound havoc so simply
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* wait for the end of transfer */
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pcm_play_lock();
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dac_buf = NULL;
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dac_size = 0;
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dac_state = DAC_STOP_PENDING;
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pcm_play_unlock();
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}
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void pcm_play_dma_start(const void *addr, size_t size)
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{
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pcm_play_lock();
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/* update pending buffer */
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dac_buf = addr;
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dac_size = size;
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/* if we are stopped restart playback, otherwise IRQ will pick up */
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if(dac_state == DAC_STOPPED)
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play();
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else
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dac_state = DAC_PLAYING;
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pcm_play_unlock();
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}
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void pcm_play_dma_pause(bool pause)
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{
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imx233_dma_freeze_channel(APB_AUDIO_DAC, pause);
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dac_freezed = pause;
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}
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void pcm_play_dma_init(void)
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{
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audiohw_preinit();
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}
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void pcm_play_dma_postinit(void)
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{
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audiohw_postinit();
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imx233_icoll_enable_interrupt(INT_SRC_DAC_DMA, true);
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imx233_icoll_enable_interrupt(INT_SRC_DAC_ERROR, true);
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imx233_icoll_set_priority(INT_SRC_DAC_DMA, ICOLL_PRIO_AUDIO);
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imx233_dma_enable_channel_interrupt(APB_AUDIO_DAC, true);
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}
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void pcm_dma_apply_settings(void)
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{
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pcm_play_lock();
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/* update frequency */
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audiohw_set_frequency(pcm_fsel);
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/* compute maximum transfer size: aim at ~1/100s stop time maximum, make sure
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* the resulting value is a multiple of cache line. At sample rate F we
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* transfer two samples (2 x 2 bytes) F times per second = 4F b/s */
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dma_max_size = CACHEALIGN_UP(4 * pcm_sampr / 100);
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pcm_play_unlock();
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}
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size_t pcm_get_bytes_waiting(void)
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{
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struct imx233_dma_info_t info = imx233_dma_get_info(APB_AUDIO_DAC, DMA_INFO_AHB_BYTES);
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return info.ahb_bytes;
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}
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const void *pcm_play_dma_get_peak_buffer(int *count)
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{
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if(!dac_freezed)
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imx233_dma_freeze_channel(APB_AUDIO_DAC, true);
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struct imx233_dma_info_t info = imx233_dma_get_info(APB_AUDIO_DAC, DMA_INFO_AHB_BYTES | DMA_INFO_BAR);
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if(!dac_freezed)
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imx233_dma_freeze_channel(APB_AUDIO_DAC, false);
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*count = info.ahb_bytes;
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return (void *)info.bar;
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}
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/*
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* Recording
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*/
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/* Because we have no way of stopping the DMA properly (like for the DAC),
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* we can only let the tranfer finish on stop. However if the transfer is very
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* long it could take a while. We work around this by splitting big transfers
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* into small burst to make sure we can stop quickly. */
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#ifdef HAVE_RECORDING
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static int adc_locked = 0;
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static struct pcm_dma_command_t adc_dma;
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static void *adc_buf; /* current buffer */
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static size_t adc_size; /* remaining size */
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enum
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{
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ADC_RECORDING,
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ADC_STOP_PENDING,
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ADC_STOPPED,
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}adc_state = ADC_STOPPED;
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void pcm_rec_lock(void)
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{
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if(adc_locked++ == 0)
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imx233_dma_enable_channel_interrupt(APB_AUDIO_ADC, false);
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}
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void pcm_rec_unlock(void)
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{
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if(--adc_locked == 0)
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imx233_dma_enable_channel_interrupt(APB_AUDIO_ADC, true);
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}
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void pcm_rec_dma_init(void)
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{
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imx233_icoll_enable_interrupt(INT_SRC_ADC_DMA, true);
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imx233_icoll_enable_interrupt(INT_SRC_ADC_ERROR, true);
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imx233_dma_enable_channel_interrupt(APB_AUDIO_ADC, true);
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}
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void pcm_rec_dma_close(void)
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{
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pcm_rec_dma_stop();
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}
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static void rec(void)
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{
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/* split transfer if needed */
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size_t xfer = MIN(adc_size, dma_max_size);
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adc_dma.dma.next = NULL;
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adc_dma.dma.buffer = (void *)adc_buf;
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adc_dma.dma.cmd = BF_OR(APB_CHx_CMD, COMMAND_V(WRITE),
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IRQONCMPLT(1), SEMAPHORE(1), XFER_COUNT(xfer));
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/* dma subsystem will make sure cached stuff is written to memory */
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adc_state = ADC_RECORDING;
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imx233_dma_start_command(APB_AUDIO_ADC, &adc_dma.dma);
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/* advance buffer */
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adc_buf += xfer;
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adc_size -= xfer;
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}
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void INT_ADC_DMA(void)
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{
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/* if stop is pending, ackonowledge stop
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* otherwise try to get some more and stop if there is none */
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if(adc_state == ADC_STOP_PENDING)
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{
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adc_state = ADC_STOPPED;
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}
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else if(adc_state == ADC_RECORDING)
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{
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/* continue if buffer is not done, otherwise try to get some new data */
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if(adc_size != 0 || pcm_rec_dma_complete_callback(PCM_DMAST_OK, &adc_buf, &adc_size))
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{
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rec();
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pcm_rec_dma_status_callback(PCM_DMAST_STARTED);
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}
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else
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adc_state = ADC_STOPPED;
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}
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imx233_dma_clear_channel_interrupt(APB_AUDIO_ADC);
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}
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void INT_ADC_ERROR(void)
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{
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adc_state = ADC_STOPPED;
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pcm_rec_dma_status_callback(PCM_DMAST_ERR_DMA);
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imx233_dma_clear_channel_interrupt(APB_AUDIO_ADC);
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}
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void pcm_rec_dma_start(void *addr, size_t size)
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{
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pcm_rec_lock();
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/* update pending buffer */
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adc_buf = addr;
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adc_size = size;
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/* if we are stopped restart recording, otherwise IRQ will pick up */
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if(adc_state == ADC_STOPPED)
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rec();
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else
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adc_state = ADC_RECORDING;
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pcm_rec_unlock();
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}
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void pcm_rec_dma_stop(void)
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{
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/* do not interrupt the current transaction because resetting the dma
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* would halt the ADC and clearing RUN causes sound havoc so simply
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* wait for the end of transfer */
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pcm_rec_lock();
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adc_buf = NULL;
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adc_size = 0;
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adc_state = ADC_STOP_PENDING;
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pcm_rec_unlock();
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}
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const void *pcm_rec_dma_get_peak_buffer(void)
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{
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struct imx233_dma_info_t info = imx233_dma_get_info(APB_AUDIO_ADC, DMA_INFO_BAR);
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return (void *)info.bar;
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}
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#endif /* HAVE_RECORDING */
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