rockbox/firmware/target/mips/ingenic_x1000/spl.lds
Aidan MacDonald 0e1a90ea1d x1000: SPL refactoring
This streamlines the boot code a bit and reduces target specific
boilerplate. The clock init hack used by the bootloader has been
"standardized" and works for the main Rockbox binary now, so you
can boot rockbox.bin over USB without special hacks.

Change-Id: I7c1fac37df5a45873583ce6818eaedb9f71a782b
2021-07-08 16:01:38 +00:00

55 lines
925 B
Text

#include "config.h"
#include "cpu.h"
OUTPUT_FORMAT("elf32-littlemips")
OUTPUT_ARCH(MIPS)
ENTRY(_spl_start)
STARTUP(target/mips/ingenic_x1000/spl-start.o)
MEMORY {
/* First 4k of TCSM is used by mask ROM for stack + variables,
* and the next 2k are occupied by SPL header */
TCSM : ORIGIN = X1000_TCSM_BASE + 0x1800,
LENGTH = X1000_TCSM_SIZE - 0x1800
}
SECTIONS
{
.text :
{
*(.init.spl);
*(.text*);
*(.icode*);
} > TCSM
. = ALIGN(4);
.rodata :
{
*(.rodata*);
} > TCSM
. = ALIGN(4);
.data :
{
*(.data*);
*(.sdata*);
} > TCSM
. = ALIGN(4);
.bss (NOLOAD) :
{
_bssbegin = .;
*(.sbss*);
*(.bss*);
*(COMMON);
*(.scommon*);
_bssend = .;
} > TCSM
/DISCARD/ :
{
*(.MIPS.abiflags);
*(.eh_frame);
*(.rel.dyn);
}
}