0e1a90ea1d
This streamlines the boot code a bit and reduces target specific boilerplate. The clock init hack used by the bootloader has been "standardized" and works for the main Rockbox binary now, so you can boot rockbox.bin over USB without special hacks. Change-Id: I7c1fac37df5a45873583ce6818eaedb9f71a782b
95 lines
3 KiB
C
95 lines
3 KiB
C
/***************************************************************************
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* __________ __ ___.
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* Open \______ \ ____ ____ | | _\_ |__ _______ ___
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* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
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* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
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* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
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* \/ \/ \/ \/ \/
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* $Id$
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*
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* Copyright (C) 2021 Aidan MacDonald
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
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* KIND, either express or implied.
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*
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****************************************************************************/
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#ifndef __CLK_X1000_H__
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#define __CLK_X1000_H__
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#include <stdint.h>
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#include "x1000/cpm.h"
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/* Used as arguments to clk_set_ccr_mux() */
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#define CLKMUX_SCLK_A(x) jz_orf(CPM_CCR, SEL_SRC_V(x))
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#define CLKMUX_CPU(x) jz_orf(CPM_CCR, SEL_CPLL_V(x))
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#define CLKMUX_AHB0(x) jz_orf(CPM_CCR, SEL_H0PLL_V(x))
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#define CLKMUX_AHB2(x) jz_orf(CPM_CCR, SEL_H2PLL_V(x))
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/* Arguments to clk_set_ccr_div() */
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#define CLKDIV_CPU(x) jz_orf(CPM_CCR, CDIV((x) - 1))
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#define CLKDIV_L2(x) jz_orf(CPM_CCR, L2DIV((x) - 1))
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#define CLKDIV_AHB0(x) jz_orf(CPM_CCR, H0DIV((x) - 1))
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#define CLKDIV_AHB2(x) jz_orf(CPM_CCR, H2DIV((x) - 1))
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#define CLKDIV_PCLK(x) jz_orf(CPM_CCR, PDIV((x) - 1))
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typedef enum x1000_clk_t {
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X1000_CLK_EXCLK,
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X1000_CLK_APLL,
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X1000_CLK_MPLL,
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X1000_CLK_SCLK_A,
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X1000_CLK_CPU,
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X1000_CLK_L2CACHE,
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X1000_CLK_AHB0,
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X1000_CLK_AHB2,
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X1000_CLK_PCLK,
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X1000_CLK_DDR,
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X1000_CLK_LCD,
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X1000_CLK_MSC0,
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X1000_CLK_MSC1,
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X1000_CLK_SFC,
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X1000_CLK_USB,
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X1000_NUM_SIMPLE_CLKS,
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X1000_CLK_I2S_MCLK = X1000_NUM_SIMPLE_CLKS,
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X1000_CLK_I2S_BCLK,
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X1000_CLK_COUNT,
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} x1000_clk_t;
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/* Calculate the current frequency of a clock */
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extern uint32_t clk_get(x1000_clk_t clk);
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/* Get the name of a clock for debug purposes */
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extern const char* clk_get_name(x1000_clk_t clk);
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/* Clock initialization */
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extern void clk_init_early(void);
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extern void clk_init(void);
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/* Sets system clock multiplexers */
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extern void clk_set_ccr_mux(uint32_t muxbits);
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/* Sets system clock dividers */
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extern void clk_set_ccr_div(uint32_t divbits);
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/* Sets DDR clock source and divider */
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extern void clk_set_ddr(x1000_clk_t src, uint32_t div);
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/* Returns the smallest n such that infreq/n <= outfreq */
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inline uint32_t clk_calc_div(uint32_t infreq, uint32_t outfreq)
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{
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return (infreq + (outfreq - 1)) / outfreq;
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}
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/* Returns the smallest n such that (infreq >> n) <= outfreq */
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inline uint32_t clk_calc_shift(uint32_t infreq, uint32_t outfreq)
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{
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uint32_t div = clk_calc_div(infreq, outfreq);
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return __builtin_clz(div) ^ 31;
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}
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#endif /* __CLK_X1000_H__ */
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